Need help with schematic to stripboard layout

[Pojo]

First post! I apologize if any of the following is hard to follow, I'm not the best with using forums or translating my thoughts into words in general.

I made up my own jfet based drive circuit on breadboard and I'm really happy with the sounds I'm getting. It's a rather large project with 6 pots and 2 toggles but as long as it fits in a 1590bb I'll be happy. I managed to make up a schematic (will be posted below) using ExpressPCB's free schematic software and am looking to create a stripboard layout from it. After several hours trying, I just can't seem to wrap my head around creating a decent layout. I would get the first gain stage up and it would end up taking up like 1/3rd of the board! So my first question is whether or not its practical to use stripboard for this project (but I'd prefer to if its possible). Any help with getting this going would be tremendously appreciated!

Also, I know some might question why I'm using 2 resisters for each jfet drain and source. The reason is because each jfet needs to be measured for Vp and ldss to determine the ideal resistances needed, and despite taking up more space, I'd rather use fixed resisters instead of trim pots. Having the option to use 2 in series means I can get closer to the ideal values and if only 1 is needed a jumper can be subbed in for the 2nd resister. But if there's a better way that would save space, I'm all for it

Lastly, I'm using the stripboard commonly available with the IC 87 marking on the bottom. I'm all for using the entire thing if needed.
http://www.taydaelectronics.com/hardware/prototyping-boards/small-stripboard-94x53mm-copper.html

Schematic:

[Digital Larry]

I have been using the combination of TinyCAD for schematic capture and VeeCAD paid version ($26) for stripboard layout.   You need to use trace cuts to compact the size of your layouts.  The paid version of VeeCAD has a few nice features that make it well worth it.

There might be something better but these worked OK for me.

[Pojo]

I'm using diylc-3.27.0 for the layout, which is adequate for unaided layout creation. Might have to check out VeeCAD as you suggested, does it assist in the mental aspect of the layout design? So far, even with trace cuts, I'm unable to really get this going. Might be that I'm too strict on myself with keeping all resisters laying flat and trying to keep capacitors' natural lead spreads intact without stretching or squeezing them.

[armdnrdy]

First post!   After several hours trying, I just can't seem to wrap my head around creating a decent layout.

You put all of two hours into and didn't master the art of circuit routing?

My friend.....sometimes I work on large board layouts for days without being happy with the way it's going! Just like anything, the more time you spend doing it, the more proficient you become.

I look at some of the first things that I routed and ugg! I rework them.

One thing that I found is a change of venue.....and a different view helps see things/paths that you weren't able to catch before.
I often print out my work in progress, walk away from the PC, and sit outside while I review my work.

I am able to find paths and move components around in problem areas that I was stuck on.

Don't give up after two hours!

[Pojo]

Thanks for the perspective, I'll have to take all that into account for sure. I have a habit of panicking a little when I set a goal and seems like I've made no progress within my preferred night/morning play time

So, given the size of the circuit (which I don't think is THAT big), anyone see any issues with this being worked to fit on a 30x15?

[digi2t]

I'll echo what armdnrdy. Complex vero layouts can take me days, or even weeks to complete. Sometimes, no matter how much you shift things around, a larger enclosure is the only option. It's the nature of the beast.

Normally, I don't set out with the enclosure size first. This is a sure fire way to disappointment. I always draw up the vero layout first. Don't bust your head on condensing just yet. Just get everything on the board, and back trace it to the schematic to ensure it's sound. Once that's done, you can start shifting things around to get the board more compact. This step is the most time consuming, and often frustrating, of vero layouts. Try to work with one component at a time. This may not be possible sometimes (might have to move two or three others to make room), so keep track on paper what you've moved where. Also ensure that you haven't inadvertently moved/jumped any cuts. Once you think that you're done...

walk away.

Come back to it in a day or two, and back trace again. I can almost guarantee that you'll find some bug, or a way to compress further.

A decent layout on vero, to me, means;
a) All your components are laid out in a fashion that requires the least amount of space possible (without components looking all messed up).
b) Your audio path will steer clear of LFO areas (if present).
c) You've tried to reduce the number of cuts/jumpers as much as possible (that's a tough one with vero, but not critical).

A final piece of advice, also based on what armdnrdy said, print your layouts at work, if possible. I may end up printing 10 or 20 different versions for back tracing, before settling on a final version. Usually 3 copies of each (one copy to verify the power rails, one copy to verify the traces, and a third to verify the off board connections). If you have access to a company printer... use it!

[Pojo]

Thank you both for the insight. Looks like I went into this expecting a challenge, but nothing overly tedious and terribly time consuming. I'll keep plugging away and will report my progress.

If you have access to a company printer... use it!

Off topic- The ironic thing is I'm actually a designer for a graphics shop specializing in dirt bike decals and screen printing. So, no shortage of printers! The thermal transfer vinyl printer and CAD table cutter will sure come in handy when it comes time to dress up some of these diy projects. 

[PRR]

> any issues with this being worked to fit on a 30x15?

450 holes?

You have over 111 onboard leads.

Plus you need places to land your offboard leads.

You can NOT jam stuff so close it fills 100% of holes. (I've done that with a highly repetitive LED/diode array, but that's not random analog amplifier.)

Often I would be happy to use 10% of holes. Say 30x33 hole array.

Hard work to get to 25% holes used. 444 hole array. And to get there you probably have to stand-up all resistors and every cap you possibly can.

Also I've ignored your 2-resistor trim. I guess that only adds 10 leads? Still, if obsessed with compactness, you might find your resistors on breadboard (you don't need caps for that), then transfer FET+resistor sets to the build.

[Pojo]

It's not that I'm obsessed with compactness, just trying to make this happen with the materials I already have. I've maxed my 'fun' budget for the month :/ But definitely thank you for laying it out like that, I haven't seen any references mentioning ideal hole/lead ratios and that helps me get an idea of what to expect.

With the IC 87 boards, I can make use of 4 more columns and rows if I include the rows cut short by the corner mounting holes (takes away 4 holes from each corner). So that takes it up to 34x19 - 4x4 = 630 and a ratio of about 19% (getting better). I'm also considering that some of the components will be offboard, such as the caps for the top boost toggle and heat pot (both tentative feature labels). Maybe even the whole tonestack, who knows?

you might find your resistors on breakboard (you don't need caps for that), then transfer FET+resistor sets to the build.

I'm sure its due to my lack of experience but you lost me here? 

[Buzz]

Find your resistor values for each jfet on the breadboard.

( I think a trimpot on breadboard, then measure trimpot, how you do it doesn't matter )

Mark the jfets before removing them from the breadboard. I've wasted time not doing this.

Find the closest resistor value and use these in the stripboard, instead of two resistors, at D and S.

I can't see the advantage of using two resistors.

Which is part of what PRR just said.... I believe breakboard was a typo.

[Pojo]

The issue there is the level of precision I'm going for with the drain/source resisters. The difference between say a 12k and 15k would be (imo) too much for this situation. Using 2 resistors allows me to get MUCH more precise...almost down to the 1% tolerance of the metal film type. I built the measuring circuit on perf shown on runoffgroove's fetzer valve page so I can measure for the proper values ahead of time.

As an update, I'm closing out tonight (err morning) with the voltage source and 2/5 gain stages laid out. Still have what looks like 3/5th of the board available...its a start!

[Renegadrian]

I'll try to lay that bitch out!!! 

[Pojo]

If you have the time, by all means, have at it! 

Update: My layout's coming together nicely...all that's needed is the 5th gain stage, tonestack, and output. Somehow I still have damn near half the board available and almost the entire leftmost column free for the remaining offboard landing.

[Pojo]

I *think* it's done...could very well have bugs though. In fact I would be utterly shocked if it didn't. It's now time to step away for a while and come back later to double and triple check. If anyone else would be ok lending their eyes, I would certainly be most grateful as well . But most importantly I just appreciate the insight and tips which got me motivated to get this far.

Really didn't expect that much open holes, and really makes me think I screwed something up. The solder side of the board's gonna look like swiss cheese with all those cuts!

edit: probably obvious, but the 4 cuts on each corner are just to mark the mounting holes on the  IC 87 boards.
edit2: cuts under R4 and C5

[Renegadrian]

not bad... but it could be smaller than this...5 "please do it" and I'll do my own layout...

[Pojo]

Cheers! I'm sure it could be smaller...if I would have stood up the axials it would probably be half the size. But with six pots, 2 toggles, stomp, my skill level, I'm pretty much limited to 1590BB or bigger anyway

But I'd be most interested to see another take on it and learn from it.....so 'please do it' 

[Pojo]

Ok so I was hoping to get back on to announce that this is verified, but as I pretty much figured, not the case. I did stumble on a couple mistakes as I was building the board, R5 and R6 have the values reversed in the layout, also R13 is supposed to be 2.7M not 1M. I corrected those as I went along. But something else must be wrong as well. Here's a breakdown of the symptoms:

Normally, this would put out about tubescreamer level of overdrive on the lo gain setting and get well into the realm of metal on high gain. Now? it passes signal but it barely will pass into clipping. Lo gain setting is completely clean even with gain and heat maxed.

When hi gain is selected I get a high pitched squeal or screeching sound. The pitch of the squealing can be manipulated with the gain pot and heat pot...certain settings of the gain pot seem to morph it from a mid to high pitch squeal to a multi-frequency screech. The heat and bright/flat toggles (both toggle or fade between jfet source bypass caps) just change the pitch, with those it seems like higher capacitance = higher pitch.

I'm wondering if maybe the signal path is inadvertently branching off into where it isn't supposed to?

Also strange to me, I'm only showing about 3.4K of resistance between the supply rail and ground which seems to confirm something must not be right near one of the jfet drains.

Regarding other troubleshooting, I've checked the voltages on the jfets and they appear fine, scanned vigorously for solder bridges. Unfortunately its almost 430 in the morning here and work is just a catnap away. Next opportunity to continue isn't for another 18 hours or so.

I kinda feel lame asking for help troubleshooting my own circuit but the solution feels like a million miles away right now. Anyone have any ideas on where/what the issue might be?

[Pojo]

Bug found and layout is verified I doubt the interest is there but if someone would want the updated layout, I can post. If not I'm letting it go.

The issue was that the junction of R5 and R5b (drain resisters for Q1) was shorted to the junction of R26 and the level pot. A cut along that trace under R24 or R25 provided the fix. That also explained the low resistance between Vs and Gnd. I guess that also means I was sending some DC into the amp during last nite's testing since the any coupling cap would have been bypassed.