CMOS inverter as Multiple Feedback Filter

[Fancy Lime]

In a recent thread about comparator noise problems (http://www.diystompboxes.com/smfforum/index.php?topic=118624.0), anotherjim made the interesting suggestion to use a CMOS device for the comparator instead of an op-amp. That got me thinking: why not just use a Schmitt trigger made from two sixths of a hex inverter and two resistors. Don't know if that works yet, but I'll try and see what happens.

But now we have four more inverters to do something with and I was thinking about using them for the pre comparator and post ripple counter low pass filters. Sallen Key topology is not going to work here without extra hoops but I was thinking a Multiple Feedback Low Pass should be possible to implement using a single CMOS inverter stage.

Am I wrong? Has anyone used that before? If that works, that would make the whole layout so much simpler. I could not find a comprehensive resource on filter topologies using CMOS inverters, which is probably not surprising since this is not their intended use. Does anyone know something to read up on this?

Cheers,
Andy

[anotherjim]

All you need for a Schmitt trigger is a non-inverting function, so 2 inverters with an overall feedback R and input R.
BTW, I think I meant Linear CMOS op-amp in that other thread (CA31xx, TLC2xx), since they are closer to rail-rail on inputs and outputs (although usually the inputs can't go to the +supply while they can go negative of the -supply).

To make the inverter Schmitt "adaptive" the input can be DC biased via another input resistor - to pull the input closer to one or the other threshold.

[Fancy Lime]

Ah, I understand. However, I don't think I want rail-to-rail action here. It seems that (at least some) of the noise is transmitted via the rails and is introduced by the comparator. I would expect that to only get worse for a true rail-to-rail comparator, no? So the idea was to use a CMOS inverter based Schmitt trigger, which can easily be isolated from the rails with two resistors (220Ω to 1k) between each rail and the power supply pins of the inverter. I think it should also be possible to limit the slew rate by running a small cap between the power pins but I'll have to test that first. If that works it may (or may not) also help with the high frequency dirt and increase stability.

Andy

[anotherjim]

Well, its true that anything switching fast enough can "kick" the power supply and be heard in the rest of the circuit. A satisfactory solution is to give the noisy circuit it's own power supply. A local set of supply capacitors (Electro+ceramic) and star power/ground distribution is usually enough. If it can stand some voltage drop, then an added series resistance is better. Breadboards with split power rails can be helpful for this.

It's difficult to breadboard a circuit that's as good as it will be when soldered up and in a case.

[Fancy Lime]

True, some problems might "magically" disappear in the final box. But it's nice to have worked out if there are more fundamental problems before taking out the iron. I tried the separate power filtering and bias network, separated from the main power line with a 47Ω R right after the reverse protection diode, but no luck there. The noise remained but the tracking got way worse.

[anotherjim]

We're not addressing the thread title!
All the inverting op-amp circuits can be done with an inverter, so long as they don't need any positive feedback. So yes, you can do the multiple feedback type. I'd expect the S-K can be done too if you take the feedback element after another inverter set at unity.

[Fancy Lime]

Yeah, you are right, filters was the topic. I would also expect S-K to work by just taking two inverters in series, which is the same as a non inverting CMOS buffer does internally. But I wouldn't want to use two stages when I can have the same result with one stage plus one extra resistor for MFB vs S-K. If one were to use a non-inverting hex buffer like the 4050, on the other hand, S-K would make more sense. However, conventional wisdom says that unbuffered inverters are the only CMOS stages that sound at all decent in analog operation. Everything else is internally made up of several consecutive inverters that are open-loop. So massive massive gain and no way to control it externally, meaning no way to keep it from going digital as it is designed to. Come to think of it, using two consecutive inverters as a non-inverting unity amp for a S-K would also require extra resistors for the same reason.

I'm still a bit fuzzy on how to design a Butterworth MFB lowpass but the Texas Instruments Application Report is quite exhaustive. Gotta work my way through that one of these days.

Cheers,
Andy

[R.G.]

...why not just use a Schmitt trigger made from two sixths of a hex inverter and two resistors. Don't know if that works yet, but I'll try and see what happens.

It works, but it's difficult to get a predictable input band. Unbuffered CMOS inverters (at least used to ) have again of 20-30db. Buffered gates have internal inverter stages that run the gain to quite large so there is little or no linear gain spot. The most predictable form uses resistor to set the gains of the stages in hopes of getting some predicability. It's still tough, because the input voltage range is not well specified, nor is the gain, nor is the linearity.

But now we have four more inverters to do something with and I was thinking about using them for the pre comparator and post ripple counter low pass filters. Sallen Key topology is not going to work here without extra hoops but I was thinking a Multiple Feedback Low Pass should be possible to implement using a single CMOS inverter stage.

Depends on the Q you want, and the gains. high Qs have quite high gain requirements on the underlying gain stages. Cascading CMOS gain stages reintroduces the uncertainties about gain, and makes getting a feedback ampo stable. And there's not much in the way of a differential input, which makes things even harder.

I could not find a comprehensive resource on filter topologies using CMOS inverters, which is probably not surprising since this is not their intended use. Does anyone know something to read up on this?

I don't think there's a single resource on the topic, comprehensive or not. Probably best is a copy each of "the CMOS Cookbook" and "the Active Filter Cookbook".

Just shuffle the pages together... 

[...] I don't think I want rail-to-rail action here. It seems that (at least some) of the noise is transmitted via the rails and is introduced by the comparator. I would expect that to only get worse for a true rail-to-rail comparator, no?

Maybe not "no". More like not necessarily. Opamps and comparators being "rail to rail" doesn't mean the outputs are necessarily more coupled to the rails, nor that they make the rails noisier. It just means that the output and/or input can swing closer to the rails without banging into some internal stops. What does matter, as always, is good layout, good power bypassing, and good grounding. Besides that, things don't generate noise when they are held against the rails, they generate noise when they're on the move between the rails. That is, A.J.s rignt about the rail and bypassing thing.

True, some problems might "magically" disappear in the final box. But it's nice to have worked out if there are more fundamental problems before taking out the iron. I tried the separate power filtering and bias network, separated from the main power line with a 47Ω R right after the reverse protection diode, but no luck there. The noise remained but the tracking got way worse.

Then that's not where the noise issues were coming from.

[Fancy Lime]

It works, but it's difficult to get a predictable input band. Unbuffered CMOS inverters (at least used to ) have again of 20-30db. Buffered gates have internal inverter stages that run the gain to quite large so there is little or no linear gain spot. The most predictable form uses resistor to set the gains of the stages in hopes of getting some predicability. It's still tough, because the input voltage range is not well specified, nor is the gain, nor is the linearity.

Well, yes I would expect to control the gain on the stages that make the Schmitt trigger separately to something safely below open-loop gain to make them behave. So maybe a gain factor of 5 or so.

Depends on the Q you want, and the gains. high Qs have quite high gain requirements on the underlying gain stages. Cascading CMOS gain stages reintroduces the uncertainties about gain, and makes getting a feedback ampo stable. And there's not much in the way of a differential input, which makes things even harder.

For the purpose of harmonics controlling low pass I would normally go with Butterworth characteristic. Higher Q might cause more problems in this role than it would solve. And each 2nd order filter should use only one inverter. If I read the MFB topology correctly, then the resistors in a MFB Butterworth lowpass should anyway be chosen such that the inverter is set to unity gain. The resistor arrangement is very similar to what I would do to turn a CMOS inverter into an inverting unity audio buffer.

I don't think there's a single resource on the topic, comprehensive or not. Probably best is a copy each of "the CMOS Cookbook" and "the Active Filter Cookbook".

Just shuffle the pages together... 

Ah, so just like I do my cooking... That sometimes turns out, ahem, "interesting".

Then that's not where the noise issues were coming from.

It does seem that way. My only problem is that I am out of ideas where it could possibly come from if its not the power lines. The noise occurs even if the output of the comparator is not connected to anything. Even if the output buffer is not connected to anything on its input, the noise can be heard just as loud as ever. The comparator sits on its own block on the bread board inches away from anything else. Curious.