quick question re smd transistors

[njkmonty]

more of a double checking question

on the data sheest of the smd jfets it says "source and drain are interchangeable?"

is that right?
so as long as the gate pinout is correct it doesnt matter?

or is it ... "it will work, however its best to layout the transistor correctly for it to work correctly??"
https://www.fairchildsemi.com/datasheets/MM/MMBFJ201.pdf

https://www.mouser.com/ds/2/149/MMBF5457-889721.pdf

[Rob Strand]

is that right?
so as long as the gate pinout is correct it doesnt matter?

This question comes up now and again.

It is is true for many JFETs that the drain and source can be swapped because internally the device is symmetrical.

However,  you should wire it as per the datasheet pin naming.   There is no reason to swap the pins about.

[Clint Eastwood]

However,  you should wire it as per the datasheet pin naming.   There is no reason to swap the pins about.

Well, the datasheet tells you that the source/drain pin naming is arbitrary. So you can do whatever you like.  And I don't see why you would need a reason for that.

[PRR]

JFETs are symmetrical for all our purposes.

If there is a difference, it is that Gate-end capacitance may be 1.5pFd one way and 2pFd the other way. This is like less than an inch of trace/wire/cable. In Audio we just don't sweat such small stuff. In >100MHz radio work, where all connections are super-short, it matters, some, maybe enough to notice.

That datasheet is just confirming that, even if you are RF-fussy, it really does not matter which is D or S. And, duh, the 2N5457 is specified as an audio/switching part, not an RF part.

[Rob Strand]

So you can do whatever you like.  And I don't see why you would need a reason for that.

It doesn't add anything it only subtracts:
- When someone reviews your design it looks like a mistake.
- When someone modifies a PCB they modify it incorrectly.
- Probing the wrong pins when testing or debugging.

If people need to feel clever by swapping pins they can go right ahead  but it sounds more like an insecurity issue than a good design practice.

[Rob Strand]

If there is a difference, it is that Gate-end capacitance may be 1.5pFd one way and 2pFd the other way.

Actually that difference can come about because the spec for Cgd is at a higher voltage than Cgs.  The depletion capacitance decreases with increasing reverse voltage.  So in reality they are even more symmetrical.

One asymmetry is the pins, the gate is usually kept away from drain.   That helps keep external capacitances down for wide-band stuff.

This one is clearly asymmetrical,
http://www.onsemi.com/pub/Collateral/2N5486-D.PDF

[duck_arse]

that's an interesting datasheet, Rob. as far as I can see, it only explicitly identifies one pin of the package, and that is in the last "data" before the disclaimer.

[PRR]

The design of JFETs was well understood in the 1950s. Economic fabrication lagged a while. After some ad-hoc parts, someone sat down and optimized JFET layouts for the several types of duties. The reference for this was National Semi's paper, which is STILL hosted, though now at ON Semi.
NS's AN-6609 JFET tables

Essentially ALL the JFETs you can buy will be from these base designs. (With modern fabrication, some of the ones that don't fill the die are probably re-sized for about the same device on the smaller dies now possible with teeny dicers and fabricators.)

The vast majority appear to be S-D symmetric in the action-zone. Process 50 is our all-purpose flour and very prettily symmetric. Process 52 is a smaller thing for higher audio impedances and specifically says "symmetric". 53 is too tiny, 58 too huge, to hide any asymmetry.

Process 92, UHF amp, clearly runs the G trace Asymmetrically away from the D trace to favor low C(gd) over C(gs).

Many others are unclear, and we can't really know the inside paths under the surface metalization.

[PRR]

> it only explicitly identifies one pin of the package, and that is in the last "data" before the disclaimer.

It IDs pin 1, and lists the three pins.

Just as in DIP chips, if you know which end pin 1 is on, you know where the others are.

[Rob Strand]

that's an interesting datasheet, Rob. as far as I can see, it only explicitly identifies one pin of the package, and that is in the last "data" before the disclaimer.

A screw-up for sure.  The little pic on the first page usually shows 1,2,3.

Click on the ON semiconductor datasheet:
http://pdf.datasheetcatalog.com/datasheets/320/72258_DS.pdf