Tech note: distortion in Phaser JFETs

[R.G.]

I did some A-B comparison between the MXR P90 and P45. The P45 sounds less harsh somehow. A little digging turned up the reason - the P45 uses drain-gate feedback to linearize the JFET a bit.

In the P90, the JFETs are used as voltage variable resistors with no linearization. There is a 22K resistor from drain to source. The P45 splits the 22K into two 10K's, and runs a 0.01 cap from the midpoint of the 10K's to the gate of the JFET, which is then isolated from the control voltage by a 470K resistor. The result is much less distortion from the JFET, particularly on bigger signals.

The P90 can be modded to do this. It's not easy, but you might find it pleasant.
1. remove the 22K resistor which runs from the drain to source of a phase JFET.
2. substitute in two 10K's in series, midpoint in midair.
3. remove the gate lead from the PCB.
4. insert one lead of a 470K into the gate-lead hole.
5. solder the gate lead to the mid-air end of the 470K
6. solder a 0.01uF cap (preferably film, but probably ceramic, given the room to work inside the box) from the mid-air junction of the 10K's to the mid-air junction of the gate and 470K
7. repeat for each of the other three JFETs

What you get is cleaner sound in the phaser; this is very desireable unless you only play heavily distorted.

[Tim Escobedo]

I'm wondering if there's any way to "linearize" BJTs when used in a similar application. I've been playing with them as simple level control devices and find the distortion just enough to make them unusable. Which is a shame, becayse I have TONS of these nice little NPN BJTs just waiting to be used...  

[gez]

I remember seeing some schematic recently that used diodes to get a more linear response with BJTs.  I think they were part of the collector load or something.  I'll look through my files and see if I can dig it up (might not be suitable though)...

[R.G.]

I'm wondering if there's any way to "linearize" BJTs when used in a similar application

If there is, I've never found it. The only way to get linear Rce on BJTs is to run the signal level down, as far as I know. I gave up on them, and only use them as on-off switches in shunt mode.

[gez]

Sorry, the schematic/article i mentioned isn't relevant, it was on how to get a linear response from a BJT amplifier using diodes as a load - nothing to do with collector-emitter resistance.

[Jay Doyle]

Sorry, the schematic/article i mentioned isn't relevant, it was on how to get a linear response from a BJT amplifier using diodes as a load - nothing to do with collector-emitter resistance.

Hey gez, could you post a link to that? I would like to read it.

[gez]

Hey gez, could you post a link to that? I would like to read it.

It’s from a magazine article Jay.  I don’t have a scanner but I’ll describe the basics.  The schematic uses a BC547A, its emitter is grounded, it has a 1M  resistor from V+ (6V) to base and four 1N4148 diodes as a collector load.  The diodes act as a non-linear load and this non-linearity neutralises that of the transistor’s so that ‘the voltage across the diodes becomes directly proportional to the base-emitter voltage’.  Nice little trick!

The gain is the amount of diodes you use, four = gain of four etc (you’d need bloody loads for a distortion circuit then!)  

A second schematic shows the base-emitter junction of four BC547s used as the load (collector tied to base).  This is even more efficient at reducing distortion (if the hype is to believed).

This arrangement isn’t sensitive to variations in temperature/supply voltage either.  â€œLet us assume that the collector current is increased N times due to the change of the supply voltage or temperature.  In that case the transconductance of the transistor becomes N times larger, but the incremental resistance of the diodes becomes N times smaller.  The resulting voltage gain remains the same”

[Vsat]

Tried posting earlier but post got eaten when I hit "preview"....

Using diodes for collector loads is a very intereesting technique. The method is not new, it is exploited in the Moog ladder filter and the various diode ladder filters to improve S/N ratio. Remove the capacitors from a ladder filter (or set cutoff freq to max)  and observe the filter output with a scope. The input diff pair (at the bottom of the ladder) can be driven well beyond the normal 25 mV p-p before obnoxious distortion sets in. Seems to be very little theoretical info about this technique on the net, although googling on "diode loads" gives a huge number of hits, mostly related to biomedical implants. An alternative to using a diode string  is to use a single transistor cinnected as a "N Vbe multiplier".
Regards, Mike

[R.G.]

Seems to be very little theoretical info about this technique on the net,

The collector diodes "undistort" the distortion that the base-emitter diode does.  This is a variation of the predistortion done in the inputs of linearized OTAs, where the predistortion is undone by the following amp.

It's right hard to drive a silicon junction to really have a linear signal variation on it, though 8-)

[bioroids]

Hi!

R.G. I was wondering how do you do to avoid the huge pop when using transistors as switches? I tried a few times but couldnt get rid of it. I think it has something to do with the big DC variation between the on-off states.

Also It seems I cant find any info on the net about that.

Any tips are welcome

Good luck

Miguel

[R.G.]

how do you do to avoid the huge pop when using transistors as switches?

It's harder with bipolars than with JFETs. Mostly you use a really big capacitor to keep any DC off the collector, then use a slowing ramp on the base drive waveform to limit the rate of change to something below audio. The series cap needs to be BIG. Think 100uF.

Shunt switches have a big advantage as they tend to eat their own transients when they come on. Bipolars as series switches are pretty much a disaster.

[idlefaction]

i was thinking about something related this morning, actually.  when we match FETs for phasers, we generally have this circuit with easily changeable values in it, and we plug in FETs with varying specs and cope with the differences.

i think that perhaps a better way of doing it is to figure out the voltage/resistance curve (hopefully line!) for your two FETs, and have some way of changing the circuit values it goes into to provide the line (we hope) you want.  if we can assume a straight line, this would involve getting the slopes the same, and the offsets the same.

the offset looks easily do-able by biasing the FETs individually, and we could get the slopes the same by altering the amplitude of the LFO per FET which also sounds do-able.

looking at the Ids vs Vgs graph for a few FETs, it does seem to be a reasonably straight line. so a first cut at a normalisation approach could be:

*  FET #1 - put it in circuit and measure the Vgs at the top and bottom of the LFO sweep.  if you can, disconnect the LFO and measure the steady Vgs.

*  take it out of the circuit and put it into the standard bridge FET Vgs matching circuit. use a 100k pot for the bridge resistor.

*  find the values for the pot (hence Rds) which correspond to a Vgs of the three points. hopefully all three, but the outer two are fine.

*  FET #2 - put it into the bridge circuit and find the Vgs for each of the Rds values for FET #1.  we now have a picture of how different the FETs are over the range we will be using them - we know the voltages we need to feed them to have the same Rds at the top, bottom and hopefully middle of the range.

*  if we didn't measure the midpoints of the sweeps, guesstimate them  using (Vtop - Vbottom)/2.

*  adjust the bias voltage to be the midpoint for each FET - FET #1 will be the same, FET #2 will need changing

*  adjust the amplitude of the LFO voltage for FET #2 so it sees the expected voltages as found above for the top and bottom of the LFO sweep.  ta da!

this won't work if the LFO values needed are lop-sided ie. if the Rds/Vgs isn't a reasonably straight line - but you can probably get it a lot closer than what we see at the moment.

i hate when you come up with cool ideas at work and can't post any concrete results.  

[bioroids]

That's great info. I was biasing the collector at 9v (or 4.5v), the emmiter at gnd, so when turning off or on i was getting a 9v jump at the collector. I though it was needed to alwas have the collector at a greater DC voltage than the base and emmiter. I'll se what can I do with your tips.

Thanks

Miguel

[R.G.]

the offset looks easily do-able by biasing the FETs individually, and we could get the slopes the same by altering the amplitude of the LFO per FET which also sounds do-able.

Yes, both are doable, and both are reasonable approaches to coping with the variation of FET characteristics.

All you have to do is figure out the costs in both time and money to see which way you want to go.

With selecting FETs, you have to buy quite a few more JFETs than you need - maybe three or four times as many - and spend the time messing with a $0.50 matching circuit and a DMM to find the ones that match.

With adjusting individual FETs, you have to spend more time per JFET measuring the characteristics, but you buy a lot fewer JFETs. A somewhat hidden cost is the cost of the parts to adjust each JFET in. This is at a minimum four tweaking resistors per JFET. It's a lot more expensive buying two trimpots per JFET, and I doubt that anyone would  do that unless they had a box full of surplus trimpots essentially free. Even free trimpots take up a lot of space on a circuit board, as do four more resistors per JFET. At some point you blow out of the board size that fits your box, and get to buy a new box.

But if you're building on perfboard and have a big box, the extra board space may not matter.

Manufacturers **hate** adjustments on production lines. The time and testing costs are usually larger than the cost of parts, and particularly more expensive than the engineering time to find an approach that doesn't need adjustments. Even selected/matched parts are preferable to a manufacturer, because they will always be buying enouh parts that matching is a modest extra cost. So all production JFET phasers will be the matched-parts version. The economics may be different for a home builder.

This is why economics is called "the dismal science". There are hardly ever any joyous breakthroughs or magic everything-works points.

For me personally, I would rather buy a bag of JFETs and pre-select. That's just because I can find good prices on many JFETs at a time. If I were in a position where JFETs were very expensive or hard to get, I would probably flip over and hand-tune each JFET, or figure out a way not to use JFETs. Both are valid approaches.

[idlefaction]

yeah i can see the price vs benefit thing.  pot twiddling and all that matching!  argh!  

the reason i thought about this approach is because i'm not convinced that the 'matching' we're doing here even vaguely gets us in the ballpark of having FETs that give a similar Rds/Vgs curve over the range we're operating them in.  this is because of the finicky nature of the 'bias' trimmer in the phase 45 - you *should* be able to set the bias knob anywhere and the phaser should still phase, but the trimmer should move the phasing up and down the frequency spectrum.  it seems to only give a phasing effect over a very small portion of it's travel, however, which makes me think that the FETs selected are only matched over a small portion of the range we're operating them in.

i can also hear the effect getting stronger and weaker across the sweep with the phaser on a very slow speed.

when we match at one point, we may get two FETs which cross at that point but which diverge quickly moving away from that point.  this became obviously an issue when i found that after carefully matching Rds at various Vgs's for several FETs, i could still get a better sounding phaser by randomly throwing in FETs and hoping!  

[R.G.]

when we match at one point, we may get two FETs which cross at that point but which diverge quickly moving away from that point. this became obviously an issue when i found that after carefully matching Rds at various Vgs's for several FETs, i could still get a better sounding phaser by randomly throwing in FETs and hoping!

All quite true.

A single point match (which my matcher does) is not the ideal situation at all. Multipoint matching is by far more desireable -  but then you get even fewer suitably matched JFETs in a batch; although one could well argue that since we're doing this at all, they were not suitably matched at one point in the first place 8-)

What you'd really like to do is put together a matching jig that could measure something that got you the entire Rds/Vgs curve and then look for similarities in curve so that even with a DC offset you could get a fairly close range of Rds variation with the LFO waveform. I can imagine something with an AC signal source, AC signal input, and a sweepable Vgs generator that would step Vgs in small increments and record the Vgs values for Rds of 1K, 5K, 10K, 50K etc. automatically, then give you back a sorted list in terms of relative RMS error.

While that sounds incredibly difficult, most modern computers could do it with very little effort. You use a sound card as  both signal source and signal input, then put the JFET in a little fixture with a 10K series resistor on the drain and the drain/source to ground. The Vgs could be stepped by a CMOS D-A converter fed by a printer port. You might even be able to use an R-2R network attached to the printer port directly, since the gate of the JFET is a nice, high impedance. There would be some amount of programming involved, of course... 8-)

Sigh. So much design, so little time...

[idlefaction]

*grin*  or i could use an OTA and not worry about it