True Bypass with SPDT

[R.G.]

"True bypass" as it's commonly used means that when the effect is bypassed, there is no connection to the effect signal path at all, not even through turned-off solid state switches. So it's not true bypass.

However, careful design of CMOS switches can be quite good. See the articles on bypassing at GEO -
- bypassing with the CD4053
- the technology of bypasses

Danelectro apparently uses the 4053 so it can be done.... somehow. The enigma continues.

Actually, it doesn't. The bypassing with the CD4053 at GEO is how Danelectro does it.

Buffered bypass or something like the Clinton bypass comes closest to true bypass with an SPDT.

[David]

R.G. -

Since you're weighing in on this, perhaps you can help clear something up.
I'm not trying to question you, or put you on the spot, but after reading your article about the CD5053 bypass, I was...  mostly stumped.  I didn't get what you were doing with the biasing.  I investigated other options:  the Wicked Switch, etc.  I got down to a 4053 implementation (the one Zeta did) from Laurier Gendron.  It didn't work (well, not yet).  I saw some comments you posted about the 4053 having a limit of 7 volts on something.  I'm about ready to give up on electronic switching forever!

A couple of questions, if I may?

What does the 7 volts reference?  It's not VDD, is it?
Could this thing be biased with your 386 trick?

[The Tone God]

I'm not dissing the "Wicked Switch" design.  When I worked on it Friday, I couldn't figure out to save my life how to interface an effect to it.  That seems to be due to the cold medication I took Friday night, not your design.  The DPDT switch representation you incorporated into your diagram threw me off.  I went back and traced the circuit paths with crayons (much to my daughter's disgust) and I think I understand it now.  Peter's trick appealed to me because I like to use as few components as possible.  I've got a WS on breadboard that I'm planning to hook up to a Flatline tonight.

Is there any possibility that you would consider doing a layout for the SPST / inverter model of WS on perf?

Ah its ok to knock it, its not really much of a design. I too like the one IC design but it does have some issue that have been pointed out. It another tool in the box. I did the WS that way because of certain design parameters I originally started with when I started playing with them. If you do have any question let me know.

I have designed a WS that has a pair of SPDT switches in one board. Each switch used half of the 4066 and the logic ICs were used to make a pair of control circuits. I thought posting those would be too much for people.

Get well. Being sick sucks.

Andrew