pt-80 delay time indicator?

[ryani]

Is there a way to wire an led that flashes to indicate the delay time without affecting the sound of the circuit?  I suppose it doesn't have to turn completely on or off, just so I can see a difference. Thanks
Ryan

[Paul Perry (Frostwave)]

Yes, the delay speed depends on the clock, so if you run the cloc signal to a CMOS divider, you can divide the clock down to where it is visible, driving a LED.

[RedHouse]

So Paul, I'm looking at the PT80 schematic, it's using the Princeton PT2399 which has an internal clock, where would you pick up the clock signal to implement your suggestion? it's not clear to me where the clock signal is externally available.

[Arno van der Heijden]

http://www.orchard1.com.tw/ics/pdfile/audio/2399s.pdf

pin 5?

[Paul Perry (Frostwave)]

thanks for the link Arno! I havn't done anything with this chip.. I'm suprised the clock is so high, if 20M means 20MHz.. that means you would wnat about ten binary division stages.

[Brian Marshall]

i am building a pt 80 right now.

the data sheet is not exactly thourogh is it.

[Yuan Han]

by running the clock output from the PT2399 into "binary dividers" what we're trying to do is to divide the clock speed into something perceivable by the eye ?

[Paul Perry (Frostwave)]

by running the clock output from the PT2399 into "binary dividers" what we're trying to do is to divide the clock speed into something perceivable by the eye ?

.absolutely correct!

[RedHouse]

Paul, Yuan,

If I may reiterate, just exactly where would one tap the clock osc out on the PT2399?

Your posts answer as though you guys know how to get the clock signal from the PT2399, please share the details?.

[Maneco]

It looks like pin 5 is the clock out,but beware that i don´t think that a straight binary division will give a visual indication,you'll have to experiment a bit...

[JonC]

Pin 5 is labeled CLK-O -- prob. clock out.  so that would probably be your best bet.

[Mike Burgundy]

You can use that clock out with a "controlled" devider - if you get the devision ratio right you can actually have the LED represent the exact delay cycle.  delay times (approximately) increase linearly with increasing resistance for R,  - have a look at table 1 in the aforementioned datasheet.
Let's say your fastest delay time is set with a 4k resistor (75.9ms, oscillator at 9MHz)
Let's say we want a LED flashing with the delay cycle, so that the led turns "on" every cycle an off halfway futher down.
You'd then need a devider/counter and a flipflop changing the LED state at every half of  the cycle: every 0.5*75.9ms=38.0ms. The oscillator is running at 9MHz, which equals a period time of 1/9Mhz=0.11ns. This means the oscillator needs to count out 38.0ms/0.11ns=345454 for every change. Forgive any math error
Increasing resistance will lower clock frequency, which in turn makes the delay time longer together with the LED flash rate.
The sound should not suffer at all - I think the osc. out (which is not even used in the demo circuit) has been made to drive TTL type ports, so hooking up a digital counter should be just fine.

[puretube]

don`t think it`ll drive TTL; rather CMOS...
(i.e.: don`t load that pin too much)

[rocket]

It's Mikroseconds (µs) not Nanoseconds (ns)

[Mike Burgundy]

CMOS makes sense since the whole thing is built on that technology. 'tWas a late night
milli, us, correct. Silly me.
So that's 38.0ms/0.11u=38E-3 / 110E-9 = 345.000. Got that right

[ryani]

Well, I'm beginning to understand this explaination. The solution is more complicated than I thought, but I think I'm getting it.  I'm new at this so I still sit for long periods of time trying to figure out what each part of the circuit does.  Every once in a while, something clicks.  Anyway, unless I'm being totally boneheaded, which is very possible, I think that while mike did say ns when he meant us, the calculation was still correct.  Maybe I'm just making a dumb error too, but I show the counter should still go to 345455 before reseting, not 345.  I did do some other calculations though and while the relationship between, clock freq and delay time is pretty linear, I got a slightly different number for say a 3MHz clock/228ms delay.  Either the relationship is not totally linear or there is some rounding in the datasheet, (or possibly I just don't know what I'm looking at, please tell me if that's the case) So I would need some more accurate numbers to get a reliable indicator using a counter and a flip flop.  Is there another way that is a little more fool proof?  I do like how you get the actual delay cycle with this method, though,  not just the timing.
By the way, thanks for all your help.  This message board is great!
Ryan