small stone and deluxe memory man

[sean k]

Howdy,
          I built the small clone back in '02 but haven't got around to boxing it as I went off on a few tube amp tangents and have recently dug it out and decided to redo the PCB with mods from
http://www.moosapotamus.com/wavy/wavy.htm
the original schematic is from tonepad
http://www.tonepad.com/project.asp?id=8
My question is basically about the the speed mod on the LFO ,around the LM358, and whether adding capacitance speeds it up or lowering capacitance speeds it up?,basically whether an added 1uf cap is in parallel or series?
 And while we're here I recently got some MN3005's to do the deluxe memory man with the schematic at freeinfo society
http://www.freeinfosociety.com/electronics/schemview.php?id=381
 and now I'm wondering if,before I start,whether the schematic is right and works?...and if it does then does anyone have a value for the cap off pin 9,to ground, of NE570 half towards the top right of the schematic.
And would someone tell me if this is right...pinout for the MN3005,I did a search and found something from Mr Hammer and looking at the above schematic.
  pin 1 = ground
  pin 2 = clock
  pin 6 = audio out
  pin 7 = audio out
  pin 8 = neg Voltage
  pin 9 = clock
  pin 13 = audio in
  pin 14 = neg Voltage

   so this means,and its kind of apparent looking at the chips,there ain't no pin 3,4,5 and 10,11,12.Therefore where does the connection  to pin 12 on MN3005 "A" really go to?

[Mark Hammer]

1) Understand that whenever there is an integrator involved, the charge-up time of the capacitor dictates the frequency at which the circuit will oscillate.  Bigger-value caps take longer to charge up and discharge, so there is the rule of thumb you were asking about: larger-value caps decrease the range of sweep rates, and smaller value caps raise the range.

2) Those chips that use package sizes corresponding to larger numbers of pins, but without those pins, are a real pain in the butt.  Particularly because the pin descriptions are not terribly standardized, or rather not everyone adopts the same frame of reference.  Sometimes the pins get referred to by the pin number in the schematic (i.e., it may be situated where the 7th pin would go, given the package size, but it is *only* the 4th pin along that side, and sometimes they get referred to by their location number (i.e., it is exactly where you'd normally find the 6th pin on that side, regardless of what else may be there or be missing).  I fidn the best thing to do is to simply work with the datasheet at hand at all times, and confirm the pin identity keeping its functional role in mind.  In other words give yourself some capacity to confirm which pins are, say, the clock input pins, regardless of what the current schematic might possibly call them.

Fortunately, from what I understand, Beiling now produces MN3208 clones that come in 8-pin dip-sized packages.  That means the pin numbers on the chip correspond to the physical location all the time, without having to grapple with any ambiguous numbering.

[Vsat]

Sean,
The key to that Memoryman schemo is this:

View the MN3005 as a normal 14-pin DIP, but with all the pins removed from the middle of both sides. Then label the existing pins in the normal manner, uppermost left corner is pin 1, pin below it is pin 2, jump over the empty space below pin 2, next is pin 3, then pin 4, hop across the bottom of the chip and you are at pin5, pin 6 is above it,  jump over the gap, you hit pin 7, and then pin 8 at the upper right corner. Doing this from memory, you should compare the data sheet and the schematic with this system to make sure you don't fry the chip.
Regards, Mike

[sean k]

Thankyou chaps,I've got the mn3005 pinout sussed,as I said it was apparent,and I eventually found a data sheet but thanks for the extra comment.I've been trolling around all the posts I can find about the mn3005 and finding schematics to compare how the chip is used and today I'll take a good hard look at the deluxe memory man Stephen Giles posted with the sad1024A chips and find the sheets for that and compare that with the free info society schematic that I have using the mn3005 chips. except for the fact the MN3005 have a negative drain supply and the SAD1024 uses a positive drain supply they both seem kinda similar except for the VGG pins.Also slightly perplexing is that the SG schematic uses 3 BBD's while the FIS schematic only uses 2.
But what I really want is a copy of the Memory Man on Stellan's site.I can't access it.Does anyone have a copy as this seems to be the one that works.
http://www.fortunecity.com/tinpan/humperdinck/223/memory.gif
 send to   artyone@slingshot.co.nz
Aah,I've also got the DOD FX96 schematic and have just figured out the memory man is using daisy chained BBD's so once I compare the pinouts on the MN3101 it uses in place of the 4047 in the DMMan I could be just down the road from figuring this thing out...then onto the NE570's....

Oh ,and as for the cap in the feedback loop,thanks Mark,I'll put a switch in to either have a cap in parallel or in series with the 2.2uf tantalum thereby halving or doubling the charge up time.

[puretube]

http://web.archive.org/web/19991109125521/http://www.fortunecity.com/tinpan/humperdinck/223/memory.gif

the so-called "free info soc" seems to have "borrowed" it from Stellan...

[radio]

Hello

Astounding :shock:

A memory effect in the memory of the web :wink:

Greetings

JMErnzer