Mu/SRPP internal cap

[WGTP]

What resistance value would I use to calculate the -3 point for the cap in the middle?  Thanks.

[Tim Escobedo]

If you mean the cap that connects the bottom FET drain with the top FET gate, my guess is that you would use the gate resistors of the top FET. The parallel value of the two gate resistors OR the resistor going to the junction of those two resistors (if it's configured that way).

[R.G.]

There are three resistances you need to know to calculate it in detail, two you can touch, one you can't.

These are the equivalant bias resistor from the top FET gate to AC ground, the resistor between the drain of the lower transistor and the source of the upper one, and the drain resistance of the lower transistor.

By far the biggest effect is the bias resistor. To a first order you can get the turnover by the bias resistor/capacitor time constant. However, this can be affected by the drain resistance of the lower device and the loading on it, in terms of the isolating resistor between the upper source and lower drain.  You can easily have a 2:1 change if these time constants are close to the bias resistor/cap turnover. The drain resistance of the lower device will vary with operating point and individual device, too.

To a certain degree, the lower transistor source resistor and any capacitance paralleling it can also add into the mess. Make that big enough that it's way below anything you want to listen to.

The SRPP is highly recommended for its ability to drive an external load. If you use the Mu amp version, be certain you also account for the bass rolloff of the loading of the external load on the lower drain.

See my article on two-JFET circuits for some insight.


R.G.

[Rob Strand]

That circuit doesn't have a simple roll-off.  There are a number of roll-offs and the one due to the internal cap isn't a "normal" one like many people would see it.

The upper cap makes the top JFET operate more like a current source.  If the cap is large then the gain is very high over a wide range and is largely determined by the output resistance of the JFET and the load.  If you pull the cap out the gain is low, somewhere around 1 but it can be less if you add a source resistor to the lower JFET.

The above two cases represent the extremes.  When the cap is in place there is a transistion from the low gain to high gain.  At low frequencies the cap is open circuit and the circuit runs at low gain.  At high frequencies the cap is short and the circuit runs ar high gain.  From a practical perspective the -3dB cutoff could be considered the point where the gain drop -3dB below the *high gain* area where the cap is shorted.  This point *doesn't* actually occur at the frequency implied by the RC time constant (ie f=1/(2 pi RC).  The f=1/(2 pi RC) frequency is actually where the gain *starts* to increase from unity, as frequency increases the gain ramps up, as decribed above, and it eventually hits the -3dB point below maximum gain at  f = Maximum gain x 1/(2 pi RC) -  which is considerably higher than 1/(2 pi RC).  Incidently the R is the resistance seen by the upper JFET gate, which is the parallel combination of the two bias resistors.

When you have source resistors on the lower JFET start point frequency stay the same and but the -3dB frequency is lowered.  This is because the presence of the source resistor lowers the maximum gain and hence lowers f = Maximum gain x 1/(2 pi RC).

The caps on the source resistor and the input caps add another set of roll-offs.

It's not a simple circuit really.

[Tim Escobedo]

The SRPP is highly recommended for its ability to drive an external load. If you use the Mu amp version, be certain you also account for the bass rolloff of the loading of the external load on the lower drain.

So, what's the difference between a SRPP and a Mu amp? I'd been wondering that for a while.

[Rob Strand]

Check out,
http://www.bonavolta.ch/hobby/en/audio/srpp.htm

The upper tube/JFET is a DC connected current source.

The SRPP sucks regarding the DC bias conditions, especially with JFETs, tolerances throw spanners into the works.  The muamp doesn't have this problem it actually mantains a relatively good DC bias point.  For AC signals the two circuits operate similarly except the muamp tapers the low end gain off if the inner cap is too small - not a problem only something which need to be considered.

[WGTP]

I will have to digest all that for a while, thanks for the info.

What I have done is used the Mu amp bias with 2 - 1meg resistors and incerted a 1K resistor between the 2 J201's.  I have a 1meg resister to ground at the input and a .1uf cap at the output.  It is driven by a single Black Fire stage.

Anyone hazard a guess about the frequency with a .1uf cap in the magic spot?

[Rob Strand]

With a well bypassed lower source resistor of 1k, 1k between the JFETs, 2x1MEG and 100nF "bootstrap" cap.  I got about 330Hz.  If you take the inter JFET 1k resistor out it shifts upto 700Hz or so.  So you are in typical tube screamer roll-off land.

[R.G.]

The upper tube/JFET is a DC connected current source.

The SRPP sucks regarding the DC bias conditions, especially with JFETs, tolerances throw spanners into the works. The muamp doesn't have this problem it actually mantains a relatively good DC bias point. For AC signals the two circuits operate similarly except the muamp tapers the low end gain off if the inner cap is too small - not a problem only something which need to be considered.

With reference to my article on two-FET cascades (Foolin' with FETs):
The mu amp and SRPP are not really current source loaded amps. They are push-pull amps. The trick is that the upper FET is driven by the lower FET's drain to "follow" the lower drain's gyrations. You get almost the gain of a current source loaded FET if the upper FET is nimble enough to follow the lower one well.

The difference in the mu amp and SRPP is that the isolating resistor between the source of the upper device and drain of the lower one lets the upper FET's low output impedance show through without affecting the lower FET's drain by loading.

If you simulate both, you will find that the SRPP is much more forgiving of loading. The mu amp simply must drive an impedance over about a meg to give adequate high end performance (unless you *want* to trim off high end, which is valid if that's what you're trying to do). Otherwise, it's tone-sucked by almost any loading. The advantages of the upper FET go only into gain. The mu amp shares sensitivity to external loading with a current source loaded stage, which is what you'd get if you shorted the upper JFET's gate to its source.

With the SRPP, you get the same performance except the output has the low impedance of the source follower driving it. It's entirely superior in the immunity-from-outside-influences sense. You get the ability to choose how much high end to shave off independently of other considerations. That's a good freedom to have in the design process before you start removing and special-casing things for polishing and elegance.

I haven't messed with the bias stability issue much. I would be surprised at the SRPP being tremendously different from the mu amp in that regard, but it might happen. I'll have to look at it and think.

I view the mu-amp as a special case of the SRPP - a circuit that has lowered the isolating resistor to a few milliohms.

[Rob Strand]

The mu amp and SRPP are not really current source loaded amps.

I'm not so sure about that.  For the SRPP, if the upper JFET has enough VDS to keep out of the triode region then it's a pretty stiff old current source.  For the muamp, if the  "bootstrap" cap is large enough (ie. we are well out of the roll-off region) then the cap effectively holds VGS constant and hence ID remains contant (again provide we are out of the triode region).  With the muamp, the whole picure changes when you are in the roll-off region. I'll have a read of your article - some of this stuff differs only in angle you view it from.

As far as the gain goes I view these things as a current source feeding the parallel combination of the rds of the upper and lower JFET and the load.  On the SRPP (and  muamp with an inter-JFET resistor) the rds of the upper JFET is effectively increases due to local feedback around the source of the upper JFET.  

f you simulate both, you will find that the SRPP is much more forgiving of loading.

I'll definitely check that out, looks like I have some tinker to do.

[R.G.]

I suspect we each have hold of a different part of the elephant.

[RDV]

I built AMZ's Mini-Boo, but used all the mods from R.G.'s article on the JFet Mu-Amps and came up with a FIRE BREATHER :!:
A virtual Tubescreamer on steroids. Tons of gain. Tons.
I also drew it up if anyone want's a look just email me & I'll send when I get home from work.

Regardness

RDV

[WGTP]

I think there is a good chance I will go to my grave without understanding all of this, but I'll tell you where I'm coming from.

First I feel blessed to have stumbled onto this place and to have been bestowed with these circuits and you guys to help me with them.  

I made this particular distortion to combine my 2 favorites, the Blackfire and the Mu/SRPP.  I didn't socket the cap to ground in the Blackfire and it's a bit wooly running into the SRPP (which I used to minimize the issues R.G. discussed in his article and used the Mu bias scheme for minimum parts) with a .1uf bootstrap cap, so I have reduced it to a .022.  This smoothed out the bottom.  I will probably go back and reduce the BF cap from 4.7uf to 2.2uf, which will then result in raising the bootstrap cap.

I find you can sort of voice the thing by controlling which stage the lows or highs are strongest in.  

Also, by having disimiliar stages, using the guitar volume and the between stage gain allows contolling  how much distortion is coming from each stage.  Thanks again, and carry on.

[Rob Strand]

RG, I had a play around on the simulator and I didn't see a marked difference in behaviour of the SRPP vs. the muamp with low impedance loads.  That's under the proviso of course that the muamp is operating in the high-gain region - in the low frequency low gain regions the two ckts don't really compare on any gounds.  (If need be you can make the muamp closer to the SRPP by adding a source resistor on the upper JFET on the muamp.)

As far as the current source issue goes I'm quite certain the upper JFET behaves as a current source.   Basically I did a transient analysis and plotted the drain current for the JFETS.  Under high-impedance loads the AC currents in the JFET are largely due to the (non ideal) output impedance, rdso, of the JFETs, which is in the order of 100k or so.  In spice the flow of these currents shows up as drain current (as expected) which kind of blurs what is going on - in effect the load current is split into three parts the upper JFET, lower JFET and the output load resistance . However, if the load resistance is made low enough compared to rdso  (or equivalently rdso made high enough to remove the non-deal channel modulation effect) then the drain currents no longer have this confounding effect[Ed].  When you do this the drain current of the upper JFET is essentially contant  (there's some tiny current variations due to the rdso) and all the output current comes from the AC drain current component of lower JFET.

For AC amplifiers using JFETs I'd say the muamp is a superious circuit.  With tube based circuits, because they always operate a the triode region, the DC problems you get with JFETs aren't so bad and that's why you see workable SRPP designs with tubes- the DC problems don't go away they are are just reduced to a useable level.

[Jered]

Excellent discussion guys, lots of great info, I love it!   Jered

[WGTP]

Guess I'll bypass the 1K resistor between the JFET's and see what happens.