Triggered filter to work on

[StephenGiles]

http://img.photobucket.com/albums/v517/uncle_boko/camilla_filter.gif

Have a look at this circuit which I worked on for a while last year. It needs some learned input if you please.

[lovekraft0]

Damn, Stephen, where do you get all these cool sidechain designs? This isn't "learned input" by any means, but wouldn't it be better to connect the analog switch directly to the positive rail, rather than the comparator's output (if there's something obvious I've missed, please feel free to point and laugh  )?

[StephenGiles]

Here and there, I don't know the answer - nor does anyone else it seems - too many noses in fuzz boxes!!!!

[Paul Perry (Frostwave)]

I suspect that in practice, one needs a detector with separate charge & discharge times, to allow for varying playng styles. Maybe even a 'refractory' stage, that is, a period after triggering where the circuit can't be retriggered.
Another irrelevant thought.. it would be easy to have a CMOS oscillator that you can use to trigger automatically, to turn it into an autowah.

[Mark Hammer]

Insomuch as the dual filters are similar to the arrangement used in the Anderton Bi-Filter, here is a very useful addition that I stumbled onto the other night (confirmed to work).

I stuck a 10k linear pot straddling the outputs of the two filter sections, with the wiper being their common output.  This allows for relative balance of the two filters, increasing the range of voicings available, from very bass-friendly to more chicka-chicka 70's porn sounds.  Although I haven't tried it out yet, it occurred to me that a more useful arrangement might be to have three filters.  Anderton originally used only a modest stagger between filter sections (.010uf and .0033uf cap, as opposed to the .01uf and .0015us caps you use).  I like the sound of the more widely spaced filters (it can sound a bit like an envelope controlled phaser at times), but imagine that we had three filters using .01uf, .0033uf and .001uf caps.  The balance control I mentioned above would tap the outputs of the lowest and highest sections, leaving the middle filter section alone.  The balance control would now allow the user to vary the unit from something more bass-relevant to guitar relevant.  A simple toggle would let you cancel the middle filter outright. 

What do you think?

[lovekraft0]

OK, if I'm seeing this right, the FWR (IC1b, D1, D2, etc.) drives the comparator (IC1c) low when it reaches the comparator's threshold, enabling the 4001 clock (IC4) to cycle the analog switch (IC5a). If that's correct, then when the clock is enabled, IC5a is switching between the comparator's output, which is close to the negative rail, and the bias point of the LED buffers (as set by VR3), lowering the LED current. If you connect IC5a to either the positive rail or the output of the FWR, enabling the clock would increase the LED current and lower the LDR resistance, raising the filters' center frequencies, right? Again, apologies in advance if I'm missing something obvious.

[lovekraft0]

I knew I'd miss something - in order for the circuit to work as described above, it will need another gate wired as an inverter between the clock output and the analog switch, since the clock output is high when the clock is disabled. Or at least that's what I'm seeing.

[snap]

I see a one-shot in IC4, which shoots when the envelope has reached a certain threshold level, thereby closing switch IC5 until the envelope has fallen under the threshold again.
IC5 passes IC1c`s outputvoltage at that time to buffer IC1d,
whose low output impedance charges the 2x10uF caps,
or rather sets the upper side of that cap combo to a defined voltage level.
The absolute voltage across this cap combo is further defined by the setting of VR3, while the caps are being discharged through VR4 (defining the decay time) plus 47k.
This rising or falling absolute voltage difference across the bipolar cap is buffered by IC2a, which delivers current for the LEDs.

The strange triangle symbols (strikethrough or bold) as well as the powersupply and bias scheme puzzle me a bit!

just my 2 cents.

[StephenGiles]

Mark - I agree with what you say, all good stuff indeed and I confirm that it will work. I actually tried using 4 filters a while back with both the Bi Filter setup and the MXR Envelope Follower, and some quite startling effects could be achieved. I also toyed with the idea of placing optos accross the filter output mixing resistors and modulating one or more with LFOs.

The circuit was cobbled together using "bits" from one of Uncle Penfold's efforts - possibly the Light Metal, I can't remember for the input, peak follower and trigger, the sweep generator from the EH Crashpad and of course the Bi Filter's filter.

To summarise what I am aiming for is this:

A note is played, peak follower goes high - voltage proportional to strength of note, fast trigger generated for opening gate to sample momentary high voltage which is passed to sweep generator, being allowed to sweep at a rate determined by the Rate pot to the voltage set by the Start Frequency pot. Actually I think the Start Frequency should be called Stop Frequency - my mistake - tired eyes again!

So do you see what I'm trying to achieve? - Envelope Follower style start to the sweep but synthesiser style decay, thus eliminating ripple and stutter in the sweep.

lovekraft0 and snap - thanks for your answers, I'll digest what you say.

I used EH power symbols ie. strikethrough triangle is bias, upward bold triangle +9v and downward bold triangle 0v. Is there a standard for this??

[StephenGiles]

The Penfold bit comes from the Guitar to Synth Interface here:
http://hammer.ampage.org/files/GuitarP2V.PDF

[snap]

but you are sampling the output of comparator IC1c,
which is schmitttriggerish either full high or full low;
unlike the voltage you`re aiming for,
which exists at D1/330n;
this is the momentary envelope height
you want to be switched by IC5a towards IC1d.

Isn`t it?

[StephenGiles]

So would it be better to just have a buffer amp after the D1/330n junction do you think?

[snap]

worth the try - imho better than the comparator`s output
which is always at the same level when triggering.

then the start/stop frequency can arbitrarily chosen to be higher
or lower compared to the envelope level
(to be set by the sensitivity pot, which decides
when the sampled envelope-height is going to be transmitted
to IC1d),
and this would lead to the characteristic,
that the filter either goes up or down from the start frequency
towards the momentary envelope value,
or goes up or down from the momentary envelope value
towards the stop frequency;

or hmmm???  ask Mr. Keen?

or add a small valued pot in series with the cap combo
to additionaly be able to set a variable attack rate?

[StephenGiles]

That makes sense Snap, many thanks. I'll repair to my breadboard on Sunday, we're off to the Polo tomorrow

[lovekraft0]

After spending several hours playing with this sidechain in simulation, I finally figured out what's going on here - please disregard my previous dismally uninformed posts. Sorry if I contributed any confusion.

It works handily, at least in sim, but there are still a couple of things I'm wondering about - first, shouldn't the comparator threshold pot vary between V+ and bias, since the rectifier's output will always be positive, and second, won't the sweep rate RC network slow down the attack as well as the decay (ie, won't the cap have to charge/discharge the difference between the envelope level and the start pot's level)? I'm looking forward to hearing what the breadboard results are.

[StephenGiles]

Ok I'll try that. Many thanks for your trouble here. Have to get ready to go out!!!!!

[snap]

sorry - I only simulated it in my virtual imaginary head.
that`s why I am a little puzzled too, concerning what
is having to go to zero, and what ought to be going to
half the power supply voltage.

[R.G.]

So would it be better to just have a buffer amp after the D1/330n junction do you think?

I do. I would put the buffer IC1D at at that D1/330n junction and leave its + input there. I would also put the analog switch after the buffer and before the 2x10uF caps at IC2a's + input.

That way, IC1D always tracks the input envelope. When the envelope exceeds the sensitivity trigger, it fires the CMOS one-shot and turns on the analog switch, which lets the IC1D buffer charge up the caps to the envelope voltage. The cap voltage will either track the envelope or decay, depending on whether the caps and decay rate is faster than the envelope, until the one shot expires and lets the switch open. When the switch opens, the voltage on the caps decays at the rate set by the 47K and Sweep Rate.

The only hole I can see in that is in the details: Will your CMOS live in the +/- voltages you have set up? If not, you'll need a lower voltage supply for them. Will the 4066 live on a steady diet of charging 10uF cap? If not, you'll need to either limit the peak current, use all four 4066's in the package, or some other switch to do the switching.

I might add a filter driver inverter from the output of IC2a to switchably let me set one filter to sweep up while the other sweeps down.

Neat work Stephen.

[StephenGiles]

Thanks for that RG, updated schematic here
http://img.photobucket.com/albums/v517/uncle_boko/camilla_filterv2.gif

I agree that a filter driver inverter from the output of IC2a would be nice, which needs to be drawn in together with Mark's third filter idea. I think I'll see how the basic circuit behaves first. Is there a way of forcing the cap voltage to just track the decay rate with the switch in that position - perhaps a second switch between the D1/330n junction and the + input of IC1d?

I would dearly love to breadboard this tonight, but after the lunch we had today at the Polo Club - vast quantities of superb Indian curry cooked by experts from India, washed down with a couple of large glasses of full bodied red wine, I feel more in need of sleep right now!

[snap]

enjoy your meal!

well, IC5 did have a 1k current limiter in the 1st schem;

in the new schem, why switch the current-intensive output of IC1d
instead of its noninverting input?
since at the moment of no signal (idle), the envelope is low,
you could bias IC1d to exact that low nosignalvoltage (idle)
and only add the momentary envelope voltage at the trigger moment
via IC5 at the input side of IC1d without superfluous current drive.

then again you could insert aforementioned small series pot
for adjusting the attack (charging) time of the bipolar cap.