JFET biasing on the ROG Umble

Started by rocker-D82, November 21, 2006, 08:12:05 PM

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rocker-D82

I'm back to the forum!  :o :o :o

I have a question for you. I make a little modification to the ROG Umble schematic in the power supply and JFET biasing zone. Can anyone tells me if it works?


Mark F

If my observations are correct it appears you are going to bias all of the FET's with one trimmer. If my observations are correct I don't believe this will work unless you happen to hit on a bunch of closely matched FET's. ???

petemoore

  I can't see the image, but a drain resistor per Jfet Stage.
Convention creates following, following creates convention.

lovric

tthe main reason for individual trimmers was that jfets specifications vary greatly from one individula transistor to another. hopefully, they won't if you buy them from the same reel, still conncted to the holding ribbon. it may work for you if it happens to be that consecutively produced fets have close specifications.

petemoore

  Maybe something could be done with the idea of using 1 drain resistor for multiple Jfets [perhaps put one that starts off needing a larger D resistor than the other one on which is fed through a smaller drain resistor off the first ones drain resistor...
                 V supply
                       l   
          Main drain resistor
              l                  l
              l                  Little stop resistor
   Jfet Stage          Jfet Stage
   To get some 'squash' effect?
  But I can't recommend it because it's outside anything I've seen or tried, also tweeking the Drain Bias looks like it'd be a long row to hoe.
  Possibly some current starving circuit could be wrought out of it...?
  Have the second stage simply there to throw the first stage off', taking the output off the first transistor.
 
  I don't know why it'd work...lol.
Convention creates following, following creates convention.

jrc4558

it won't work. you don't have a resistor across the which the voltage will form... you effectively short all the fets toghether

lovric

you just slapped me out of deep sleep  :D

rocker-D82

Quote from: Constantin Necrasov on November 23, 2006, 11:15:47 AM
it won't work. you don't have a resistor across the which the voltage will form... you effectively short all the fets toghether

If a use a resistor between Vb and fets?? (a resistor for any fet!)

Fp-www.Tonepad.com

if you would edit that schematic connecting all the 'vbias' points together instead of having them all invisibly go to 'vbias'... you've shorted all the FETs.
www.tonepad.com : Effect PCB Layout artwork classics and originals : www.tonepad.com

zjokka

I built the Umble too and used pots on a breadboard for easy biasing. Plugged the pots in the breadboard, connected all outer lugs together and then to + 9V psu. Then plugged in wires from all middle lugs and used alligator clips to connect these to the DRAIN legs of the fets.

I did this because in building the Prof Tweed with trimpots nobody believed I didn't have a solder bridge when one fet didn't bias and only moved between 8.94V and 9.03V or something. That it went down to 6.5V with a 3M4 resistor proves to me there was none.

Anyway, I have the same problem with the Umble - first three trimpots (Q1-3) bias fine at 4.5V using 2k7, 7k5 and 2k3 respectively, but the last one won't budge. stays between 8.96 and 9.05V, just as before.

what can one do then? switched fets around, no change...

zj

zjokka

Q4 still doesn't bias, the rest go fine

Please, I really need some help on this one, I probably made a stupid mistake when biasing:
a) pots aren't connected yet - does that matter?
b) like with all previous jfet emulations, one transistor can be biased but  the value runs up or down
c) ...


With 8.97V on power supply, my voltages are the following:
Q1:  D = 4.49V, S = 0.21V, G = 0V
Q2:  D = 4.6V, S = 0.3V, G = -1.20V
Q3:  D = 4.49V, S= 0.35V, G = -0.12V
Q4:  D = 8.89V, S = 1.96V, G = 0V

From Geofex Debugging page:

For an N-channel JFET to be operating as a linear amplifier, the drain (kind of like a collector) must be at a higher voltage than the source pin. The gate must be at a lower voltage than the source to have any control of the current. A JFET with a gate voltage equal to or higher than the source pin is saturated. A JFET with its gate less than the source voltage may be amplifying or may be cut off. Best to debug this with the Audio Probe.
JFETs are sometimes used as variable resistors. In this case, the gate will be held in the range of operation voltages as though it were a linear amplifier; that is, 0 to minus a few volts.
There is no good way to say how much the gate of a JFET must be negative from the source to be linear or cut off. It varies a lot from JFET type to JFET type, and even as much as four to one in the same type number.

lovric

ZJ, is it possible that the source 1.5k resistor is shorted? i'm not really shure what would happen if 22n cap before Q4 is shorted or the 100k res from Q4 gate to ground is not connected?

maybe you could put the umble schem into a simulator and purposely mess with the components around Q4 to see if it shows simmilar measurements?

zjokka

lovric,

thanks you were right, some clumsy soldering round Q4. Now I can bias them perfectly at 4.5V but the feedback noise is incredible. Experimented biasing in any direction and just turns out the sound is acceptable to good when one of the transistors (doesn't matter which) is biased at 8V or so, the rest at 4.5V

would this also indicated a problem on the board? didn't switch the fets as it is not a particular fet that seems to cause the prob.
it sounds pretty good (cannot really tell on my pratice amp) and consistent, but don't want to box up if I can improve it.

thanks

zj

lovric

if there is any significance, in real Dumb Bell, as in other valve amps, the supply goes into last stage than into resistor capacitor filter, then into screens, RC filter, and in the same manner succesivelly all the way to the input triode. if there is one supply line in your Umble, maybe you could put a ~10uF cap from the supply point between 2nd and 3rd stage to ground. i imagine that positive feedback between odd stages (1st and 3rd, 2nd and 4th) will be cut.

rocker-D82

Quote from: Constantin Necrasov on November 23, 2006, 11:15:47 AM
it won't work. you don't have a resistor across the which the voltage will form... you effectively short all the fets toghether

See that: http://goofaman.free.fr/papa/rectifet/rectifet%20principe.JPG
How works it? All fets are shorted togheter  :icon_rolleyes: :icon_rolleyes:

lovric

changes of gate voltage vary the current that goes through the fet - how much current the drain pulls from the supply. if you want to 'read' those changes at drain as voltage, you need to stick a resistor between that drain and its supply.

i have never tried what you propose in practice, that's for you to do, but it doesn't work in circuitmaker simulator.

looking at the link i see there isn't any resistor but a voltage regulator instead connected to drains. seemingly cool but totally wrong as it misses the principle of how a fet amplifies the signal. 'rectifet' works nyet!