EH Microsynth - circuit analysis?

[StephenGiles]

http://filters.muziq.be/files/schematics/eh_microsynth.pdf

I was looking at this redraw of the famous circuit and thought it would be interesting to read a section by section analysis of all the various building blocks used, in order to enhance my (and probably many other posters') understanding (pretty low at the moment) of what makes this beast tick.

In addition, a useful exercise might be to convert it to single supply use.

Any offers??

[slacker]

I agree, a section by section analysis would be nice, especially when it comes to debugging such a big circuit.
Converting it to a single supply would be an interesting project, a slightly easier solution might be to replace the powersupply so the positive rail was running off 9volts and use a charge pump to get -9 (ish) for the negative rail. That way you could power it with the same supply as the rest of your pedals, or even use 2 9volt batteries.
I don't suppose there's a nice redraw of the version with the NE5554N powersupply? If not I might attempt one.

[RaceDriver205]

Well were you to convert it, it would certainly be worlds more usefull if you could replace the CA3094s with LM13700s!

[Ry]

I seem to remember a lenghty article about it in the Device issues that Mark Hammer scanned and posted.  I don't know that it goes into the circuit block by block, however.

[gez]

I'm a bit confused.  The schematic actually had each section labelled, so there's your breakdown.  The building blocks are fairly standard for the most part, so with a little googling/pouring through the pages of a text book you should be able to sort out what's going on.

And no, I'm not going to do it! 

[StephenGiles]

Yes, I can see the labels, but I'm not the least bit technical over these things! I want to know what happens in the circuit when a note is struck, why a particular IC output goes high or low, where circuits are ORed etc. I've been a manager, people do this sort of thing for me

[Maneco]

hi Stephen!
I did a clone some time ago,and i never had access to a single ca3094 :-)   
So,i tried to use as many lm13700's as i could ...the three filter stages worked ok,and the extra ota was used in the vca,so two lm13700 for vcf and vca
The square wave modulator was done around a ca 3080
The sub-square,the same.(maybe this duo could be replaced by one lm13700? )
The envelope generator ...well i burnt a couple of lm13700 ,so you have to replace the ca3094 with a ca/lm 3080 and a couple of transistors...the ca3094 datasheet shows clearly the internal wiring if the ic...
If i try it again sometime in the future,i will do it with smd versions of the 4558,and lm13700,which i have ...pcb mounted pots so it's not a wiring nightmare...

Oh,regarding design analysis,i start

1-first opamp: input buffer and level adapter 

[StephenGiles]

I just thought it might be something different to read. I have 2 x 15 minute train jouneys to & from London now, and I'm tired of reading about Blair in the newpaper!

[Meanderthal]

 Hmmm... if ya want something more entertaining, turn the page and read the Bush drama. The American culture war is getting more interesting and heated every day.

Yes, I'd like a good read about the microsynth myself...

[RaceDriver205]

Blair

Argh! That name! It burns!

[StephenGiles]

Johnny Wilkinson is the man!!

Now come on lads, get Microsynth circuit describing!!

[StephenGiles]

This is the sort of thing: (for something else entirely)

"Key switch SW3 selects Internal or External triggering. Whichever signal is selected is fed to a precision full-wave rectifier built around IC4a and d. Network R26, R27, Dl and D2 provides compression of the rectified signal at high levels. This is in order to spread out the calibration of the Threshold control, otherwise the — lOdBm to -HOdBm range would be crammed up at one end of the knob.
The rectified signal is compared with a DC voltage from the Threshold pot RVI by comparator IC4c. If the input signal exceeds the selected threshold the output of IC4c goes momentarily positive, triggering the Attack phase (note that diode D5 prevents it going negative). Diodes D6 and D7 form an OR gate allowing the unit to be triggered also from the Manual button SW4. In the absence of a positive voltage from IC4c the trigger line SCH is held low by R37.
Trigger line SCH is fed simultaneously both to the Hold t and to the Attack circuitry (some manufacturers put these two sections in series so that the Attack phase cannot be initiated until the Hold Circuit has been set. Such gates cannot open as fast as their manufacturers claim!).
In order to achieve extremely fast minimum attack times it is necessary to discharge time constant capacitor CI4, rather than try to charge it up, since momentary currents in the order of I amp are indicated, which would place an impossible burden on the power supply. On the PCB the side chain ground is kept completely separate from the signal ground!
When trigger line SCH goes high, Ql is turned on and the Hold capacitor CI2 is discharged in about two microseconds. When the triggering signal once more falls below threshold and SCH line goes low, inverter IC5d goes high turning on CMOS switch IC6a. CI2 then charges back up at a rate set by Hold time pot RV2. Only when the voltage on CI2 exceeds 13.6 volts does the output of comparator IC7a go low; as long as it is high the side chain is held in the Attack phase. The output of the Hold circuit and the trigger line SCH are summed in NOR gate IC5a. When either of these is high the output of IC5a goes low, turning off the Release CMOS switch IC6d and causes the combined outputs of ICSb and c to go high, turning on Q2 and discharging the main time constant capacitor CI4. In order to achieve a minimum Attack time often microseconds (RV3 at zero ohms), it is necessary to inject a large pulse of base current into Q2. This is the reason for paralleling ICSb and c and also for speed-up capacitor CI3.
It is important in connection with the dbx VCA employed that CI4 discharges completely to zero volts. CMOS switch IC6c is paralleled with Q2 to ensure that this happens, otherwise the Vce voltage of Q2 would remain on CI4. For slower Attack times the rate of discharge is set by Attack pot RV3a.
When both the Hold circuit and the trigger line SCH go low, Q2 and IC6c are turned hard off, switch IC6d is turned on and the side chain enters the Release phase. CI4 is then charged up linearly by the current mirror circuit of Q3 and Q4, the actual charging current being set by Release pot RV4. For the Attack phase an exponential change of voltage on CI4 with time is appropriate, but it is unacceptable for long Release times, manifesting itself as a sudden drop in volume followed by a slower decay. Hence the use of a constant current charging circuit. The Release pot must control a range of three and a half decades of current, while maintaining a sensible knob calibration and the current mirror circuit enables a conventional pot, of modest value, to be used.
The Attack pot of Channel I also provides for very long Attack times for fade-in and is required to operate over six decades of current while maintaining a sensible knob calibration. This is not easy! Transistor Q5 is strapped across RV3a and is itself controlled by RV3b. As RV3a is rotated towards the low resistance end Q5 is progessively turned on reducing further the resistance of RV3a. In this way the ordinary log law of RV3a is converted into a 'super-log' law - at mid position the resistance is only 2% of maximum instead of the usual 10%.
Setting up the law is extremely easy using PR3, as will be seen later. The control voltage CVI stored on CI4 is buffered by IC7b, the output of which is used directly for gating. This control voltage is inverted and level shifted in IC7c to provide a complimentary control voltage for ducking. Which one is used is selected by Mode switch SW5. These gate and duck control voltages are mimmicked by LED2 and LED3, driven by Q6 and Q7 respectivley, showing whether the gate is open or closed, or in between.
From the Mode switch the selected control voltage goes via attenuator RV5 -the Depth pot. Once again the law of this pot is pulled about, by R54 and R55, in order to give a desirable control calibration. RV5 is buffered by IC7d. The dbx 2150 VGA gives unity gain with zero volts on its control port and attenuates as the control voltage goes positive. In our design we have arranged for CVI to go to zero volts with the gate open and rise to +13 volts or so as the gate closes. CVI is attenuated by R56 and R57 to give a maximum attenuation in the signal path of just over 90dB. R56 and 57 are of low value so as not to load the VCA control port unduly and it is this which necessitates buffering RV5 with IC7d."

......that sort of thing.............

[davph30]

micro synth question. as anyone turned the power led to effect on/off?

Thanks
Dave

[slacker]

Mine hasn't got a power LED so no I haven't. I guess you'd just have to replace the stomp switch with a DPDT or 3PDT if you wanted true bypass and use the unused pins to switch the LED.

[Bernardduur]

micro synth question. as anyone turned the power led to effect on/off?

Thanks
Dave

I did

Quite simple; just use the leftover 3 pins on the switch (it is an DPDT switch that only uses 3) to switch the LED on and off!

[R.G.]

"The Technology of the Micro-Synth" eh?

If it doesn't happen otherwise, I'll do one, but right now it has to go to the bottom of the "I gotta do this as soon as I can get to it... " list.

[StephenGiles]

That would be wonderful RG, I believe it is more complicated than folks think!

[puretube]

10 pages of potential analysts, with almost 10k views...

[StephenGiles]

"The Technology of the Micro-Synth" eh?

If it doesn't happen otherwise, I'll do one, but right now it has to go to the bottom of the "I gotta do this as soon as I can get to it... " list.

Hey RG - did you ever get round to doing this?

[R.G.]

Hey RG - did you ever get round to doing this?

Sorry, not down to there on the list yet.