Single IC sample&hold

Started by Hides-His-Eyes, February 26, 2011, 05:28:00 PM

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Hides-His-Eyes

http://www.futurlec.com/AnalogDevices/AD781JN.shtml

$10 a piece, but what could we do with this:

-clock the trigger for a bitcrusher; but there'd be horrific clock bleed...

-S&H filter; what happens if you feed an S&H with an LFO on the analogue and a non-matched clock; random S&H? How can we get a clock of random length pulses without a pic?

-Random trem? Random delay time?

-PICs are £1 vs $10... Does a £1 PIC have the hardware to do this job?


cloudscapes

Thats how the bugbrand bugcrusher does it. Theres a schematic on his site. Id google it but im on my phone ... :'(    i built a few samplerate reducers with this chip. I kept the clock noise down by gating the output with a vactrol setup. Another thing is that theyre bipolar supply. I used a max1044 for the negative power from DC
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Hides-His-Eyes

Could you just bias it like an op-amp?


Wait, I just worked out how stupid that suggestion is. When you hold a signal, that's DC.  ::)

What does modulated bitcrushing sound like with an LFO?

CynicalMan

While this could be useful for simplifying layouts, IMO a analog switch or a MOSFET, a resistor, and a capacitor do a fine job for much less money.

soggybag

Looks like it wants to operate at +-10.8V. Not sure how to read that, but 9V might not b suitable.

cloudscapes

+ and - 9v is fine. I got it to work on just 9v and 0 once but damaged the sound. For good or ill
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{www.dronecloud.org}

Hides-His-Eyes

Quote from: CynicalMan on February 26, 2011, 11:21:35 PM
While this could be useful for simplifying layouts, IMO a analog switch or a MOSFET, a resistor, and a capacitor do a fine job for much less money.

I'm not familiar with that method, google didn't give it; do you have a link?

slacker


CynicalMan

This is the basic concept of a sample and hold:


That switch can be physical, or you can replace it with a MOSFET,

(the input buffer isn't always necessary, use at your discretion)

a JFET,


or a CMOS switch.


So, by tweaking these, you can get a sample and hold with three or four common components.

Hides-His-Eyes

I see; so the cap holds at the voltage into the high-Z input until it is discharged into or charged by the buffer?

What compromises have to be made on the cap type/value?

Do you want an even spaced clock or as low a duty ratio as the cap can cope with?

CynicalMan

It depends what you're doing. For bitcrushing, you want as small a sample time as possible, whether you're using the chip, or any of the capacitor sample and holds. That chip is probably just a buffer->CMOS switch->capacitor->buffer setup itself.

Hides-His-Eyes

Thank you for all your help here.

So when 'sampling', the input is just fed through? That's good.

I had one working in Falstad, which has given me some confidence, but I lost it before i could test to see the behaviour during the pulse.

N channel mosfet, right?

CynicalMan

An n-channel mosfet would hold at 0V and sample at V+, so that would probably be easiest.