JFET gain stage DESIGN

Started by Gus, September 17, 2011, 11:24:20 AM

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PRR

> The - supply with R3 is what is different than what I have seen for guitar JFET circuits

Because we generally want to do it all with one supply, preferably 9V.

> R3 is what you adjust to bias the JFET used

The great advantage of this plan is that "ANY" (almost) JFET will work for-sure withOUT bias adjustment. The trade-off, of course, is that we generally want to do it all with one supply.
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slacker

Would this work with a virtual ground, same as we do with opamps, so you had a fake +4.5volts and -4.5 volts? Think I'll breadboard it and find out.

lopsided

Quote from: slacker on September 30, 2011, 02:55:30 PM
Would this work with a virtual ground, same as we do with opamps, so you had a fake +4.5volts and -4.5 volts? Think I'll breadboard it and find out.

Hello Ian,

have you tried the idea with Vref or "fake ground"?
I was thinking about it myself, but couldn't really figure it out.

J.

tca

#23
Quote from: Gus on September 17, 2011, 11:24:20 AM
I have a sim of how I would DESIGN a JFET gain stage for guitar.

Hi Gus,
what can you say about the harmonic distortion content of the output voltage. The voltage V2 controls the exponent of the power law that relates the voltage Vin of the FET stage with the drain current ID (see this thread about almost the same topic: http://www.diystompboxes.com/smfforum/index.php?topic=93889.0). Is it mainly 2th harmonic or you can you get some other higher ones?

With V2 negative I suspect that you are stuck with second order power law between ID and Vin (typical FET) and thus 2th harmonic prevails.
Any comments?

Cheers.
"The future is here, it's just not evenly distributed yet." -- William Gibson

PRR

> I suspect that you are stuck with second order power law

No. Set Gus' R2 (actually R2||R3) to your optimum K value.



The other theories seem to set Id to about halfway between zero and Idss. Gus' plan sets a current typically far less than Idss. I'm not math-enough to know if K has a different optimum.
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tca

As I understand it, the value of k is determined, or determines, the working point of the FET. R2 is in series with a capacitor and thus does not contribute to the the value of the "equivalent source resistor". It controls the gain of the setup but varying the value of R2 you don't get another working point. k depends on the voltage bias and on the source resistor (or a positive voltage source at the source).
"The future is here, it's just not evenly distributed yet." -- William Gibson

amptramp

It would be interesting to replace R3 with an LM337 with a resistor from the output to the adjust terminal to form a current source.  If the source is sitting at about +1 volt in the existing design, the current is 0.122 mA and the resistor across the LM 337 can be about 10K.  The advantage?  You would be able to use less than 9 volts for the negative supply and the current would not vary with the negative supply voltage until it became very low.  You could use an ICL7660 and not have to worry about the voltage drop or the audio frequency getting on the output (although it may contaminate the input supply).

Gus

#27
I did post one can use a constant current device.  

I picked the J201 because there are many posts with people using this jfet.

I picked + and - 9VDC for a few reasons.  You can use two batteries to do a test build.  One might have a +- supply in a power amp.  A person might have or can build a +- 9VDC supply for their effect floor board.  If you want more stages to build a preamp why not +- if you might use an opamp or a small power amp?

39K was picked for two reasons, one Id less than IDSS at 4.5VDC across the 39k and can anyone guess the 2nd?

Look for the solid state fender Harvard amp schematic.

slacker

Quote from: lopsided on October 07, 2011, 12:58:32 PM
have you tried the idea with Vref or "fake ground"?

I tried it, but I couldn't get it to work, this was only a quick test though. I could get it to bias up in about the right place, half way between the virtual ground and the positive supply, but the output was very quiet. This is possibly because, like I said earlier in the thread, I don't understand how the current is calculated or worked out, so I don't know if it needs changing for the different voltages.

Gus's circuit works as described though. I tried it with a bunch of J310s as they're the only Fets I've got, and they all biased up around 4.5 volts on the drain.

PRR

> As I understand it, the value of k is determined, or determines, the working point of the FET.

You can bias and set gain with one resistor.

This usually needs tweaking for each JFET.

With Gus' plan, R3 sets the current and R2 sets the gain.

You set R3 for current lower than Idss but large enough to drive your load.

You may set R2 according to whatever criteria:

1) set R2 for desired gain (without regard for linearity)

2) set R2 for desired gain non-linearity (without regard for gain) between near-linear through 3/2-power to square-law.

The advantage of Gus' plan is that Id is _known_ at design-time, assuming V- is consideraby larger than Vto. This allows selection of drain resistor and specification of power consumption without knowing the exact JFET which will be used.

If your goal is #2, then it may be easier to just use the K-factor than to use Gus' separate Id and Gain trims.
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clintrubber

Quote from: Gus on October 10, 2011, 06:44:35 AM
39K was picked for two reasons, one Id less than IDSS at 4.5VDC across the 39k and can anyone guess the 2nd?

Look for the solid state fender Harvard amp schematic.

Let's add for completeness of this nice thread:

I assume for mimicing the same source-impedance (as presented to the next stage) as the 'original tube-version' has:

100k plate resistor, in || with the ECC83 internal R of 62k5  --> 39k

Bye

mojokorn

Tricky stuff.  Very cool!  I still have some more time to start at it, but after about 5 minutes, or more like 10 minutes - got a bit lost in techy calculation world, this is what I'm seeing (mostly focusing on the JFET bias and not the eq stuff before it)...

Negative bias at the Source creates a) 2x the (6 dB) voltage gain and b) another 9V of negative bias for more headroom on the input across Vgs.  C1 and C2 decouple the DC bias from the AC input.  Not sure about the K, need to think on that some more.

Feel free to correct me if I missed something.

Gus, thanks for the brain-teaser and the a new take (to me anyways) on a JFET ckt.

J0K3RX

Great Scott!!! :o This is it!!  A bolt of lightning is going to strike the clock tower at precisely 10:04 pm, next Saturday night! If... If we could somehow... harness this lightning... channel it... into the flux capacitor... it just might work.

Doesn't matter what you did to get it... If it sounds good, then it is good!

PRR

> Negative bias at the Source

Not more gain. A *closely controlled* FET current instead of hit and miss compromises with uncontrolled V(gs).

This is old stuff.

It is shown in Nat Semi's App Note 32 of 1970. TI bought National and mercifully preserves a bad fax of the Note:

http://www.ti.com/lit/an/snoa620/snoa620.pdf

Edwin/Ed Oxner and pals published a complete taxonomy of JFET bias schemes and techniques.

Designing With Field-Effect Transistors
Siliconix, Ed Oxner

http://www.amazon.com/Designing-Field-Effect-Transistors-Siliconix-Incorporated/dp/0070575371
(This is a revamp of an older work which is now rare/expensive.)

*ONE* of the so-many Malvino books has a drop-dead simple FET bias lesson.
Transistor Circuit Approximations, THIRD Edition, 1980, Malvino
http://www.amazon.com/Transistor-Circuit-Approximations-Albert-Malvino/dp/007039878X

Any of these is better than pulling a source resistor out of your pants and then bodging the drain resistor with no proportion to the load (just to find a not-jammed operating point).

And JFETs do not ever quite "sound like triodes" because they have no plate-grid internal feedback (amplification factor is far higher than in-circuit gain). There is a paper which tries to add this with a lot of added active circuitry. Bah. If you want tubes, get tubes. They have never been cheaper (on the hamburger+gasoline price index).
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mojokorn

Thanks for the book recommendation.  I just found and ordered one on Amazon (Prime none-the-less) should be here in a few days.  Also bookmarked the TI's app note.

mojokorn


mojokorn

Good ol' Malvino.  Still have this from my college days...



link supplied by Amazon (easier than uploading a pic).

clintrubber

Nice to see this thread reviving!   :)


If Gus or anybody else reads this, just curious to learn  if my answer to the riddle from Gus was correct ? 

Quote from: clintrubber on January 04, 2016, 05:09:37 PM
Quote from: Gus on October 10, 2011, 06:44:35 AM
39K was picked for two reasons, one Id less than IDSS at 4.5VDC across the 39k and can anyone guess the 2nd?

Look for the solid state fender Harvard amp schematic.


Let's add for completeness of this nice thread:

I assume for mimicing the same source-impedance (as presented to the next stage) as the 'original tube-version' has:

100k plate resistor, in || with the ECC83 internal R of 62k5  --> 39k


Bye

alfafalfa

About the type of fet used ;  a short while ago I read about someone using a fet j113 and he really liked it.
I haven't tried it myself yet ( I don't have any up to now) but I'm curious if anyone used any ?

Alf

clintrubber

#39
Quote from: alfafalfa on January 05, 2016, 12:47:28 PM
About the type of fet used ;  a short while ago I read about someone using a fet j113 and he really liked it.

It'll all come down to specs  (unless a certain artist is using a certain type in a custom made device  8) )

I did a quick compilation of FETs