http://www.elecdesign.com/Articles/Print.cfm?ArticleID=8056
There was a delay very similar to this from a South American publication that was posted a while back. It worked using a 4164 DRAM for the shift element by using the seperate D and Q lines from the memory.
Very cool. 8) Thanks for posting!
Take care,
-Peter
(originally published in "Electronics & Wireless World" Dec. 1986, page 44)
Am I doing my math right? It seems like you will get very short delay times with a standard shift register.. though depending on what you want to get out of it, it could do some interesting things for a simple circuit.
I didn't stop to think about the circuit in detail, but the main problem with using this stock as a delay line is that the delay time is limited. The shift register is fixed-length, and usually they're not that big. I think the standard one is 8-bit, so disregarding the delay caused by the D Flip Flop, and assuming we go with 50kHz for some worse-than-voice-reproduction lo-fi funkiness, you're looking at 0.16 ms of delay. You can of course put multiple shift registers end-to-end and make bigger ones, but if I'm doing my math right, 8 bits isn't going to be too noticable.
Disclaimer: I don't have a whole lot of experience with shift registers. I've used some 8-bit registers in labs, and I programmed/used a simple 64-bit linear feedback shift register for random numbers in a final project (game) for a Verilog/VHDL class. I haven't seen huge shift registers in real life; the "golden standard" seems to be 8-bit shift registers. I might be missing something, and if I am I apologize for offending the shift registers.
Of course, it's cheap and easy to make, and the imperfections created by the comparator and 1-bit conversion process might make it an interesting part of a larger circuit, especially if you go with more storage for bigger delay times.
there was a nice digital delay project in "Elektor" magazine in
Oct. 1974 (!!!), which used different AD conversion (4Bit @ 15kHz) :lol: ,
but also used 2 shiftregisters of the type: "S1685" (dual 480 Bit).
You got ~30ms out of it (15kHz: t=65µs x 480).
Still got those S1685`s (cost 9$ those times) - never got it to work - (probably killed them statically....)
:)
480 bits makes more sense than 8 :)
I've got a DIY 1 bit delay based on FIFOs in the works. Stay tuned. :D
It's just not realistic to think about this in the context of anything other than big RAM or FIFO if you want more than a delay suitable for a flanger.
I'll have a contest to give out a bunch of FIFO chips too. (a post-card thing like MikeB! 8))
FIFOs (First In First Out memories) are as close to digital BBDs as you can get.
Now we're talking at least 262144 bits.... a little more flexable than 480. Hehehe
Take care,
-Peter
QuoteI'll have a contest to give out a bunch of FIFO chips too.
ooh, ooh, me, me, me!!! :D
I'm on the verge of doing my final EE project. A digi delay is one of the ideas I've tossed in the ring.