DIYstompboxes.com

DIY Stompboxes => Building your own stompbox => Topic started by: DrAlx on May 27, 2014, 05:26:49 AM

Title: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on May 27, 2014, 05:26:49 AM
NZF Flanger ("NZF = Near-Zero Flanging").
 
Motivation:
About a year ago I posted a circuit design and stripboard layout for a flexible flanger based on Thomeeque's EM3207 Electric Mistress and through-zero flanging (TZF) modification. It worked OK but there were certain things I didn't like about the usability of the TZF effect:

1) Setting the zero-point was a dynamic process and not at all user-friendly.  I like the zero-point to occur at the end of the sweep and the only way I could achieve that was to play chords with distortion while the effect was sweeping and then tweak the "Zero" control pot in order to try and put the zero-point at the end of the sweep. This was a trial and error process and needed doing each time I changed the Rate or Depth pots.  This very quickly became a real pain in the backside.

2) Most of the time the sweep was far away from the zero-point, so it sounded like a regular flanger for most of the sweep, and the zero point was crossed quickly.  It was not possible to set the controls in way that would keep the sweep near the zero-point.  

3) Subtractive TZF did not give full signal cancellation when feedback was high. That was because the variable delay line had feedback, but the fixed one did not.


I soon realised that I wanted a user-friendly TZF effect with minimal control knobs, the ability to keep the sweep close to the zero-point, and that didn't involve any tweaking to set the zero-point.  I started thinking about how I could achieve that and have arrived at a design that sounds noticeably different to my first circuit and not at all like an Electric Mistress, even though it is largely based on it.  I am not sure if the approach I took has been used before.  My new flanger has 3 control knobs (Depth, Rate, Regeneration) and a switch to toggle between Additive/Subtractive flanging.  There is no control knob to set the zero-point.  The regeneration scheme will give full cancellation at the zero-point when subtractive flanging is used, but to be honest it doesn't sound as I expected and I prefer the sound with no regeneration.
 
The circuit uses two parallel delay lines that both have a sinusoidal sweep (i.e. the variation in the delay time is sinusoidal).  I think the EHX Flanger Hoax also uses sinusoidal sweeps on parallel delay lines but in a different way.  In the Flanger Hoax the sine waves are either in anti-phase or in quadrature, so they cross each other giving TZF at the crossing points.  In my circuit, the two sine waves are always in phase, but they can have different amplitudes and the aim is for them NOT to cross each other.  Instead they should just touch each other at their minimum points and this is where the TZF effect occurs.  So strictly speaking the flanging is not "through-zero" but rather "down-to-zero and back".  

This approach allows the effective flanger sweep to stay close to the zero-point, and more importantly it allows the zero-point to be set in a systematic way using trimpots.  Once the trimpots have been set, the effect will sweep to zero (without crossing it) for most combinations of Rate and Depth.  For the slower Rate values, the zero-point will be crossed if the Depth is too large.  I think adding voltage regulation to the LFO section will fix that but I would need to recalculate all the resistor and pot values in that section.

Other than that, the main issue I have with my build at the moment is noise on the clock lines.  An audio probe on the clock lines shows that the clocks themselves have high pitched "tweets", even if there are no BBDs in the circuit.  The noise is stronger on one pair of clock lines than the other and it is clear why when you see my stripboard layout:  The two VCOs for the BBDs are taken from the Electric Mistress.  They are sensitive to RF and will interfere with each other, so I did two things that helped to minimise this problem.  Firstly, I placed the diodes that discharge the clock capacitors under the comparator ICs so that the discharge paths are absolutely as short as possible. If these paths are long then they will act like a pair of interfering antennas.  The other thing I did was place a 100nF ceramic cap between the base of each current-source transistor and ground.  This helps prevent RF pickup in the transistor's biasing network from affecting the collector current that charges the clock capacitor.  Ideally I would physically move the two VCOs far apart as well but I wanted to fit everything into a 1590BB enclosure so that wasn't possible.  The reason one VCO is more strongly affected by noise is that key parts of it are immediately adjacent to the flip-flop stage of the other VCO.  In any case, the noise isn't really that bad as you will hear (or rather not hear) in the samples.  I may bite the bullet at some point and redo the whole layout for a bigger enclosure, put the two VCOs at opposite ends of the board, and add companding to the audio path. Or I may try a different VCO design based on the 3102 instead and ditch lots of ICs in the process.
 
Circuit Operation:

When the Depth pot is at minimum:  Both VCOs receive the same varying control voltage.  The clock trimpots are adjusted so that both VCOs respond to that voltage in the same way (i.e. so that they produce the same clock rates).  This is easily done by ear.  It's just a case of selecting Subtractive flanging, and then adjusting the trimpots until the output signal disappears.  If the flanging type is then switched from Subtractive to Additive, you will here the guitar signal but with vibrato.  This is the main difference between this flanger and other TZF flangers; i.e. additive flanging at the zero-point gives vibrato rather than a clean signal.  The Rate pot changes the speed of the vibrato but not its amplitude.  Therefore apart from setting the 2 clock trimpots to allow signal cancellation at the zero point, the clocks must also run fast enough to make sure the vibrato is not excessive when the Rate pot is high.  This is also easy to achieve.
  
When the Depth pot is increased:  The first VCO gets the same sinusoidal control voltage as before, but the second VCO gets a larger amplitude sinusoidal voltage.  The aim is for both control voltages to have the same minimum value and there is an "offset" trimpot for this.  To set this trimpot, the Depth control is set at maximum, and the offset trimpot is adjusted so that there is a single clear zero-point during the sweep for the majority of Rate settings.  As I said, it is not possible to do this for all Rate settings (the LFO probably needs regulation) so it is a bit of a compromise and I let the slowest sweeps overshoot the zero-point in order to get a single well-defined zero for the majority of Rate settings I use.
  
Pictures:

Here are some pictures of my build.  It's on regular stripboard but I used a DIY copper foil ground plane on the top surface in order to keep the layout small.  I haven't boxed it yet, but you can see from the last of the pictures that if I put the board over the control pots and rotate it a little it should fit a 1590BB.

(http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8193_Zoom_zps9cc4bfb7.jpg)
(http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8197_zps643c7e2a.jpg)
(http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8200_zps3c0dc6b1.jpg)
(http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8201_zps2a4654d4.jpg)

 
Sound Samples:

Here are some sound samples.  The first 5 samples are just the pedal going straight into a digital multitrack recorder with no amp modelling, no noise gate, and no other effects.

https://soundcloud.com/alex-lawrow/nzf-sample1 (https://soundcloud.com/alex-lawrow/nzf-sample1)
Sample 1:  Rate=High. Depth=Minimum. Regen = Off.
4 strums clean guitar sound.  4 strums Additive.  4 strums Subtractive.
Note there is no flanging sound but rather a weak vibrato effect for Additive, and very quiet sound with tremolo effect for Subtractive.
The subtractive method here does not give 100% cancellation because the VCOs are deliberately detuned (slightly) in order to avoid heterodyning when the depth is at a minimum.

https://soundcloud.com/alex-lawrow/nzf-sample2 (https://soundcloud.com/alex-lawrow/nzf-sample2)
Sample 2: Rate=Quite high. Depth starting at minimum then increasing.
In this second sample, I show how increasing the Depth makes the flanging effect appear.
First the Additive method at 4 depths.  Then the Subtractive at 4 depths.

https://soundcloud.com/alex-lawrow/nzf-sample3 (https://soundcloud.com/alex-lawrow/nzf-sample3)
Sample 3: Rate=Medium. Depth starting at minimum then increasing.
This is the same sort of thing as sample 2 but using a Tubescreamer on the input to the flanger to give distortion.
First the Additive method at 4 depths.  Then the Subtractive at 4 depths.

https://soundcloud.com/alex-lawrow/nzf-sample4 (https://soundcloud.com/alex-lawrow/nzf-sample4)
Sample 4: This shows how a slow sweep with large depth can overshoot the zero point (giving two quiet periods in succession).

https://soundcloud.com/alex-lawrow/nzf-sample5 (https://soundcloud.com/alex-lawrow/nzf-sample5)
Sample 5: Here I increase the Regen control from zero to maximum.  This shows there is a clear zero point even with large regeneration.

https://soundcloud.com/alex-lawrow/nzf-sample6 (https://soundcloud.com/alex-lawrow/nzf-sample6)
Sample 6: Here I added amp modelling, panning, and delay on the multitrack recorder.  I'm using Subtractive NZF with Tubescreamer on its input.
 

Project Instructions:

Complete instructions for the stripboard build (including the trimming procedure) can be downloaded as PDF from the following link.  
I know many people on this forum don't use stripboard so I have included a layout for single-sided PCB too :)  
I did a slightly better job of separating the two VCOs on the PCB.  I have not built the PCB but am sure the layout is correct.

Use the option to download as PDF in order to see the schematic and diagrams properly: http://1drv.ms/1jWU473 (http://1drv.ms/1jWU473)

If anyone has a go at building this then please post pictures and sound samples.

Note: The resolution of the PCB masks in the PDF may not be great, so higher resolution ones can be found here.
Make sure to choose the "view original" option.
http://1drv.ms/1ht5OIQ (http://1drv.ms/1ht5OIQ)
http://1drv.ms/1ht5U3a (http://1drv.ms/1ht5U3a)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: samhay on May 27, 2014, 07:01:42 AM
Cool.
The ground plane bodge is a nice idea. I imagine it wasn't fun punching all the holes in it though!
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on May 27, 2014, 07:07:27 AM
Cool.
The ground plane bodge is a nice idea. I imagine it wasn't fun punching all the holes in it though!
Actually cutting the breaks in the strips is the most time-consuming bit.  I reckon you can cut holes in the ground plane quicker and easier than you can drill holes in a PCB.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on May 27, 2014, 02:48:44 PM
Excellent product!
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: LaceSensor on May 27, 2014, 03:03:22 PM
from someone that owns the Foxrox TZF and EHX flange hoax, that sounds great!
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 12, 2014, 05:41:31 PM
I have been experimenting with my circuit and managed to make a couple of improvements.

1) Change the Depth pot from 100-k linear to 100-k log.
 For fast Rates, keeping the Depth close to zero gives very nice Leslie type sounds with "swish" in the high frequencies.  It's easier to dial these in with a log pot.

2) Change R13 (the emitter resistor on the Sallen-Key filter before the BBDs) from 10k to 1k.
This practically eliminates all "regular" heterodyne noise from the BBD (see my definition of "regular" below) without altering the overall frequency response.


For anyone who's interesting in designing/building a TZF flanger (or any other effect with 2 BBDs for that matter) here is what I've found from my limited experience of having designed and built 2 of them:

Ground Plane: I found the main challenge for a TZF build is limiting noise due to RF heterodyning. I always expected that to be the case which is the main reason why I used a ground-plane on both flangers.  If anyone out there has had success without a ground plane I would like to know how they managed it.

BBD biasing scheme: The first TZF flanger that I built (the Flexi-Flanger) biased both BBDs locally.  i.e. at each BBD input there was a 100k resistor going to a simple voltage divider (like in the Madbean Current Lover or 9V Electric Mistress).  After building it, I discovered that this was a poor approach to BBD biasing when there are two different clocks in the circuit.  High impedance at the BBD input gave large RF pickup, so clock signals leaked into the audio at the BBD input and heterodyned with the clocks applied to the BBD.  It was easy to demonstrate this because bleeding away the RF at the BBD input using a capacitor lowered the heterodyne noise.  So that's how I tried to fix things in the Flexi-Flanger (except I shunted the cap across the emitter resistor on the Sallen-Key filter preceding the BBDs).  This cap to bleed away RF was a "hack" to my original design, and it came at the cost of reduced audio bandwidth, distorted waveforms, and it was not totally effective either.
When I designed my second flanger (the NZF Flanger) I knew I needed to have a low impedance at the BBD inputs.  That's why I decided to bias both BBDs indirectly via the audio path even if that meant using the same bias voltage for both BBDs.  I thought the Sallen-Key filter preceding the BBDs would have a low enough output impedance with my original values but I was wrong.  Yesterday I found that lowering the emitter resistor R13 from 10k to 1k makes a big improvement.  The "regular" heterodyne noise was already quite low with a 10k emitter resitor, but lowering it to 1k pretty much killed it off.

BBD supply voltage: I gave each BBD the same supply voltage as the audio path, rather than the supply voltage of the BBD's clock generator.  This is different to all the other flanger designs that I've seen.   It just makes more sense for me for the clock signals only route into the BBD to be through the clock pins.  If there's a flaw in my thinking here then please let me know.


By "regular" heterodyne noise, I mean noise caused by RF in the audio path "beating" with clock signals within the BBD.  I use the term "regular" only because that's how I've mostly seen the heterodyning problem described for TZF flangers.
I don't have that particular source of noise in the NZF Flanger once R13 is lowered as described.  It's easy to demonstrate because using a capacitor to bleed away RF at the BBD input will not weaken the whistling sounds.
I am pretty sure those sounds actually come from the clock lines themselves as I say in my original post.  The clocks are beating with each other before they get near the BBDs, and this amplitude modulation of the clock lines leaks into the audio when the clocks work on the BBDs.

Does anyone here have experience of this particular form of heterodyning and how best to tackle it?
Maybe I'm being super picky because the noise is much lower than my first flanger and mostly not a problem, but I would clearly like to get things as best as possible.  I did experiment with using a NE570 compander and it will definitely remove the heterodyne noise, but I think it is sort of cheating, and I would like to see if I can get rid of the noise without resorting to adding more chips to the board.

Title: SHOCK: Flanger Hoax prototype gutshotz...
Post by: puretube on June 13, 2014, 07:01:41 PM
(http://img.photobucket.com/albums/v442/lectronix/hoax/stomi063.jpg)
(single-sided PCB...)

next shock: the E-H FH only has a passive 1-pole R-C lopassfilter at the input...          (for each BBD)...
  "      "     : the E-H FH only has 2 passive 2-pole R-C lopassfilters (cascaded) at the output   "
why? (http://www.diystompboxes.com/smfforum/index.php?topic=59543.20)

groundplanes? (http://www.diystompboxes.com/smfforum/index.php?topic=25380.msg166584#msg166584)

supply? (http://www.diystompboxes.com/smfforum/index.php?topic=30854.msg212792#msg212792)



more inspirations... (http://www.diystompboxes.com/smfforum/index.php?topic=49929.0)







and: where is Stephen when he is called for?  :icon_wink:




Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 13, 2014, 11:29:24 PM
A big thankyou to you PureTube  :)    I don't know how I missed all that good info before.
So it sounds like I screwed up in lots of ways :-[   ...

1) Trying to decouple digital from analog rather than decoupling the two audio paths from each other.
2) Sticking critical digital sections close to each other.
3) Not using star topology for the supply and grounds.
4) Using a single LPF before the BBDs (instead of one per BBD) and putting it far from the BBD input.
5) Trying to cram the whole thing in a 1590BB.

Time for me to go back to the drawing board on this. Assuming I resolve all of the above, would
it be a waste of time to attempt a stripboard build (assuming I put appropriate protective ground traces
on the strip-side of the PCB and find some way of doing a ground fill)?
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 14, 2014, 02:18:32 AM
I'm here but have a mega headache this morning, so trying to read this lot on my Blackberry is not easy! I always thought minimal filtering was part of the trick. This is a very interesting project for folks who want to avoid the World Cup - like myself!!!
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 14, 2014, 08:16:19 AM
I'm here but have a mega headache this morning, so trying to read this lot on my Blackberry is not easy! I always thought minimal filtering was part of the trick. This is a very interesting project for folks who want to avoid the World Cup - like myself!!!

Aahh - there you are!
As I had my Saint`s day yesterday, and my mood was brightened up by a certain W-C match,
I dug up some old schemo`s,
which, btw., are exactly 10 years old to the day ( ! ),
though I`m currently more involved in a 1-Transistor Through-Zero-Fuzz* development...

(http://img.photobucket.com/albums/v442/lectronix/SM-draw3577.jpg)

re-drawn partly schemo of one of the identical 2 delay-circuits of the Flanger Hoax from a schemo-scan:

(http://img.photobucket.com/albums/v442/lectronix/hoax/SM-BBD-detail.jpg)

There is no additional lo-pass signal-filtering in the whole pedal to what is shown in the re-drawn circuit...
(the bi-polar cap is there because of some switching and routing going on between CB and R0...)


another partly scan:

(http://img.photobucket.com/albums/v442/lectronix/hoax/SM-audio-detail.jpg)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 14, 2014, 08:49:01 AM
DrALX,

first try to insert just 2 RC`s (e.g. 10k & 2n7) from your Q1 emitter to each pin 3 of the BBDs.
(with the cap physically close between to pins 3 & 1)
(IMHO R13 can go back to 10k again...).

If the P.S. is clean, Vgg doesn`t need to be de-coupled, IMHO...
(mine comes directly from the BL3102).

But then again, it is good practice for any BBD-circuit to at least symmetrize the 2 outputs
(if not adjustable), and individually terminate them.
This eliminates a lot of glitching...


My first P.S. was equipped with inductors:
(http://img.photobucket.com/albums/v442/lectronix/SM-dev_00064.jpg)
(the blue rectangulars at the top)
but where omitted after design of a 2-sided PCB...


(http://img.photobucket.com/albums/v442/lectronix/hoax/SM-PS-detail.jpg)
(protection-diode across the regulator missing in above drawing...)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 14, 2014, 09:05:04 AM
I'm here but have a mega headache this morning, so trying to read this lot on my Blackberry is not easy! I always thought minimal filtering was part of the trick. This is a very interesting project for folks who want to avoid the World Cup - like myself!!!

Here`s the test-setup for comparing active 18dB or 24dB in/-output filtering with simpler passive RC filtering:

(http://img.photobucket.com/albums/v442/lectronix/SM-dev_00043.jpg)

(the latter proving satisfyactory...)

and that`s why the space for the 2 filter quad-opamps and their components
(to the right of the regulator)
was left empty in the final proto-PCB

(http://img.photobucket.com/albums/v442/lectronix/SM-dev_00064.jpg)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 14, 2014, 09:57:37 AM
Thank you Ton for being so kind in sharing this info.  I will try a test with an extra RC stage as you suggest with the capacitor right at the BBD input.
I have tried a cap there before but not with preceeding series resistor.  I'm not hopeful that it will fix it though...
When I first built the board I heard a repetitive pattern of heterodyne "tweets" at the BBD output because of the sweep, and some tweets were louder than others.  I then used an audio probe on the clock lines to the BBDs and heard tweets there too but the pattern was not the same as the BBD output.
Holding a grounding cap on the BBD input (with no preceding series resistor) removed many but not all of the tweets from the BBD output, and so I figured I had RF pickup at the BBD input and it needed bleeding away.  That's when I tried lowering the emitter resistance and saw that worked too.
The pattern of BBD output tweets now shows a strong correlation to the tweets on the clock lines, in that a BBD tweet always matches a loud tweet on the clock line.
If I take a 6 inch insulated wire and hold it against one of the clock pins on one BBD, and then use the other end of the wire to "probe the air"  in the vicinity of the other BBD's VCO, then the pattern of tweets and their pitch remains the same, but they get much louder in volume when the probe gets close to the trim pot and transistor of the other VCO.  So I can tell which bits of the other VCO are most sensitive (to RF in the air at least).
It's this that leads me to believe its a problem with the VCOs, although I could be dead wrong because I have limited practical experience and am just trying to make an educated guess.
I really want to use those particular VCOs because they have just the sort of properties I need to make my idea work (i.e.  the trim pots allow you to give both VCOs the same (or very similar) voltage->frequency characteristic).  The CV mapping linearly to delay is importance too.
In any case, the fact that you managed to do this all with a single sided board and low filtering was a real eye-opener and I am going to rework the layout to keep the circuit blocks properly separated.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 14, 2014, 01:49:59 PM
most important thing IMHO,
is to NOT have the two pins3 of the two BBDs interconnected directly.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 14, 2014, 07:50:44 PM
most important thing IMHO,
is to NOT have the two pins3 of the two BBDs interconnected directly.
I think I see what you mean.  If I understand you correctly, the 2 clocks may be interfering because the sampling process at one BBD input affects the input line, and so affects the sampling process at the other BDD input.  That didn't occur to me as a possible interference mechanism.  Let me hack those LPFs into the vero tomorrow and I'll report back.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 14, 2014, 07:58:43 PM
Actually let me take back what I just said.  I removed one BBD from the circuit, and so took one pin 3 out of the equation.  The tweets were still there on the other BBD.  I'll try the LPFs like I said anyway.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 15, 2014, 08:20:55 AM
most important thing IMHO,
is to NOT have the two pins3 of the two BBDs interconnected directly.


Absolutely,  thought about this - would 10k and 2n7 be really enough Ton? I would be looking at something nearer to 100k.

Also, if the BBD outputs are symmetrized, remember that you will need resistors to audio ground directly from all 4 BBD outputs. Is 56k enough? I notice that you have 100k Ton.  

What is the advantage of using a 3102 in your circuit Ton apart from generation of a clean Vgg ? Could he not cut down on parts by using a 4047 with suitable modulation tricks instead of the 311/4013 arrangement? Remember this discussion?
http://www.diystompboxes.com/smfforum/index.php?topic=49560.5;wap2

I did get a very smooth sweep in a flanger some years back using a 4047 with a TDA 1022, but was forced to remove it from my breadboard by the BBD Taliban!!
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 15, 2014, 12:52:46 PM
I removed the direct connection between the Sallen-Key emitter and BBD inputs.
Each BBD input now has its own RC filter using 10k and 2.7 nF.  I left the Sallen-Key emitter resistor at 1k.
Sadly, the LPFs didn't fix things :(

Here are sound samples.  Just the pedal into a Boss BR600 digital multi-track recorder.
I apologise in advance for Soundcloud annoyingly playing someone else's track after my sample has finished.
The reason being that on the first sample, you may have to increase the volume to hear the noise, and it will probably blow your eardrums after it finishes and then launches into playing some guy's acoustic piece.

Sample 1:  First to give you an idea of the heterodyne noise, I play a chord and then mute the strings so you can hear the noise.
It is quite low but there.  You may not notice it, but you will do if you plug the effect into a high gain device.
https://soundcloud.com/alex-lawrow/nzf-heterodyning

Sample 2: To make things more audible I increased the gain on the recording box to maximum and recorded only the noise.
About half way through the sample, I short out both 10k resistors at the BBD inputs using a screwdriver blade, effectively making them both zero Ohms.
Things get noisier because the long blade is acting like an antenna, but the heterodyne noise is the same level as before, so the LPFs do not have a noticeable effect.
https://soundcloud.com/alex-lawrow/rin10kthenzero

Sample 3: Here I use an audio probe directly on the BBD output.  Then I take it off and put in on the BBD's clockline.
Notice it's the same pattern and pitch of tweeting but louder.  That's why I reckon the VCOs themselves are the problem, rather than noise on the BBD input.  Like I said, even if I unplug one BBD from the circuit, the remaining BBD and its clockline will still have this same noise.
https://soundcloud.com/alex-lawrow/audio-probe-on-bbd-output-then-clock-line
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 15, 2014, 01:31:51 PM
Are the boards in a grounded metal box?
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 15, 2014, 01:38:21 PM
Are the boards in a grounded metal box?
I just tried putting them in one now, and put the lid on too.  No difference I'm afraid :(.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 15, 2014, 02:10:36 PM
Are the boards in a grounded metal box?
I just tried putting them in one now, and put the lid on too.  No difference I'm afraid :(.

Is there a PC switched on near the boards? That can induce the sort of noise I heard on the samples. Have a look at this - I can't see a link to the actual schematic but there is a link to the PCB parts placement so this may provide some clues to minimising the interference. It seems to use a 4046/3102/3207 arrangement for the clocking circuitry.

And I just found an old message from Puretube on this very subject - "a good PCB/vero design CAN prevent whine/clocknoise/heterodyning!

(especially when you provide enough space, like in a 19" rack...)."
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 15, 2014, 06:57:41 PM
I tried that Stephen, and I get the same noise with the PC off.  I'm sure it's the VCOs interfering because if I take an insulated wire from the clock pin of one BBD and put the other tip of the wire close to the other VCO (in order to spray interference all over it) it will make the heterodyning sound increase (and as I recently discovered, in some cases actually almost disappear, probably some phase thing).
I think I need to redo the whole layout and physically separate the two delay/VCO sections.
It won't fit in a 1590BB but will easily fit a BBDD box from Banzai.
My idea is to first build the two delay lines on separate boards.  That way I can try Puretube's scheme of separating the supply and grounds.
I'm in the process of working out a PCB layout (sneak peek below).  I may use groundplanes on my test stripboards but I reckon I can probably do without and do the equivalent of a ground-fill with the strips instead.
I've more or less got the LFO and delay lines worked out, and need to work out how to put the other audio sections on there.
There is still just a single (green) ground at the moment, but it should be straightforward to cut it up.
I haven't put in the mods Puretube suggested yet but I definitely will do.
Regarding the BBD outputs, is there really a big difference between using separate resistors or a trimmer there, or just tying them together as I have done?  I know the FoxRox Paradox just ties the pins together.  BTW Stephen , I think you forgot to attach a link or something on your last post.
(http://i1368.photobucket.com/albums/ag185/DrAlx/Example_zps4c5dddd7.png)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 16, 2014, 02:59:19 AM
No there is no link, it was from a message.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 16, 2014, 06:58:39 AM
most important thing IMHO,
is to NOT have the two pins3 of the two BBDs interconnected directly.
I think I see what you mean.  If I understand you correctly, the 2 clocks may be interfering because the sampling process at one BBD input affects the input line, and so affects the sampling process at the other BDD input.  That didn't occur to me as a possible interference mechanism.  Let me hack those LPFs into the vero tomorrow and I'll report back.


Exactly...
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 16, 2014, 07:13:55 AM
I was just going to say there are no small caps shown across the power-pins of the ICs in the schemo,
but you mentioned them in the instructrions.
So I assume they are in there in the build.
You also mention to keep the rate-pots-wires away from signal in/out.
But: keep them away from each other as well!
(You might even screen them, too).

Next thing: the daisy-chained power-supply:
Route the left sides of R58/59/60 to the power-connection separately,
and put another 100nF from their common point to ground.
Then more 100nF caps in parallel to C33 & 34.
Even better use 2 separate supply-paths
to IC4/7/8/9 & Q5
and to IC2/10/11/12
with individual de-coupling.

Supply-wise, the BBDs (IC2 & 4) can be regarded "digital",
rather than "analog"...
(my CH=270p at the input functions as anti-aliasing filter with RI
as well as clock-bleed-off with RA...).

And: don`t forget that  if you e.g. work with clocks of 249kHz & 251kHz,
you may not only get audible heterodyned 2 kHz in the audio-path,
but may also radiate 500kHz into the surrounding area,
where it can heterodyne with real Radio...
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 16, 2014, 07:55:21 AM
most important thing IMHO,
is to NOT have the two pins3 of the two BBDs interconnected directly.


Absolutely,  thought about this - would 10k and 2n7 be really enough Ton? I would be looking at something nearer to 100k.

Also, if the BBD outputs are symmetrized, remember that you will need resistors to audio ground directly from all 4 BBD outputs. Is 56k enough? I notice that you have 100k Ton.  

What is the advantage of using a 3102 in your circuit Ton apart from generation of a clean Vgg ? Could he not cut down on parts by using a 4047 with suitable modulation tricks instead of the 311/4013 arrangement? Remember this discussion?
http://www.diystompboxes.com/smfforum/index.php?topic=49560.5;wap2

I did get a very smooth sweep in a flanger some years back using a 4047 with a TDA 1022, but was forced to remove it from my breadboard by the BBD Taliban!!

1.) Input-filter: I use 100k/270p see post above...

2.) Output Rs: 100k according to datasheet...
     the symm-pot halves with CE=470p function as lopass filters for both outputs.
    (the pot-value is double the datasheet-value, to ensure there is at least a few kohm before the cap...)

3.) 3102-Vgg is nothing else but 2 onchip-resistors...
     saves me 2 resistors + drilling 4 holes, plus space...

     2x3102 is only 2 holes more than 1x4013, but spares me heterodyne-hassle
     due to physical separation,
     and then again saves me 4 resistors + drilling 8 holes, plus soace...

3102 can drive a 3207 well, without extra "push-up" inverters...


I prefer 4046 for direct voltage-controllability - spares me heterodyne-hassle on rate-pot-wires,
and doesn`t ask for voltage-controlled resistors or diodes/transistors/LDRs...


To expand furthermore,
I like sine-LFOs for modulation because of non-tickability,
and sparing an extra any-wave-to-sine-wave-conversion...
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 16, 2014, 09:05:11 AM
Thank you for the continuing support Puretube :)

I was just going to say there are no small caps shown across the power-pins of the ICs in the schemo,
but you mentioned them in the instructrions. So I assume they are in there in the build.
Yes they are on the back of the board.

Next thing: the daisy-chained power-supply:
Route the left sides of R58/59/60 to the power-connection separately,
and put another 100nF from their common point to ground.
Then more 100nF caps in parallel to C33 & 34.
Even better use 2 separate supply-paths
to IC4/7/8/9 & Q5
and to IC2/10/11/12
with individual de-coupling.
I haven't tried routing all the power back to a common point yet but I had already tried going some way in that direction
before I asked for help with this heterodyne problem.  I split the supplies for two VCOs apart like this
Code: [Select]
                                                ----(10k+470uF)----(VCO 1 ICs)----(10k+470uF)----(LFO ICs)
                                               /
9V----(10k+470uF)----(AUDIO PATH ICs  and BBDs)
                                               \
                                                ----(10k+470uF)----(VCO 2 ICs)

I could short out things on the back of the board so I could toggle between my original layout and the above modification.  I didn't hear any noticeable effect on the heterodyne noise so I put things back.  (I also tried 100nF in parallel to the 470uF caps but that didn't seem to make any difference).  I guess the existing 100nF on the IC supply pins were either already enough, or nowhere near enough.

One thing that I cant really do though is put the resistors on the ground supply lines between sections because of the global ground plane.  I may try and cut a slot in the ground plane to separate the VCOs more, and see if that helps.

One other thing occurred to me is that the precision trim pots I am using for the clocks basically consist of a loop of material that sits vertically in the air at 90 degrees to the ground plane (rather than flat against it).  Isn't that going to make nice antenna?  I think I will try and see if I can wrap those pots in grounded copper foil.  

Supply-wise, the BBDs (IC2 & 4) can be regarded "digital", rather than "analog"...
(my CH=270p at the input functions as anti-aliasing filter with RI as well as clock-bleed-off with RA...).
Thanks for clearing that up.  I was never really sure if the BBDs should be treated as digital or analogue when it comes to supply.
What you say about the cap at the input makes sense.  Just for fun I think I will have a go at disconnecting one of the BBD input lines and audio probe the BBD input pin to see how much of those clock tweets filter through to the input.


And: don`t forget that  if you e.g. work with clocks of 249kHz & 251kHz,
you may not only get audible heterodyned 2 kHz in the audio-path,
but may also radiate 500kHz into the surrounding area,
where it can heterodyne with real Radio...
Yes I know.  With some of the rubbish they play on the radio nowadays you'd think heterodyne noise would be an improvement ;)  But seriously, I seem to remember reading a thread recently about commercial products having to comply with FCC guidelines/paperwork on clocks as low as 10kHz.
I better put the board in a biscuit tin when I work on it.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 16, 2014, 11:10:39 AM
I like sine-LFOs for modulation because of non-tickability,
and sparing an extra any-wave-to-sine-wave-conversion...
Here is where my lack of experience shows.  I wanted a sine wave oscillator but have only ever built one using OTAs (from the LM13600 datasheet).
If I could find a design for a simple amplitude stable sine wave LFO (with low part count) I would use it for sure.
I only used the triangle to sine approximation because I went with what I new.
The problem with what I have is that the amplitude of the "sine" wave increases as the Rate pot decreases which is why the sweep can't be set up to give "touching sine wave bottoms" at all rates.  If there's a sinusoidal LFO that maintains its amplitude at different rates then that would be great.
Title: Re: [OT]: TZFuzz
Post by: puretube on June 16, 2014, 12:17:45 PM

...though I`m currently more involved in a 1-Transistor Through-Zero-Fuzz* development...


** (http://youtu.be/-idZbroXRRY)



 :icon_biggrin:


*** real-time (delay-less) 1 Transistor audiopath, that is...

+ extra IC-LFO (as to be found in this forum, somewhere...)  :icon_eek:
(1-transistor-oscillator possible, as well...)

DrAlx got me thinking: Envelope-controlled-TZ-Fuzzing should be possible with that only 1 transistor, though...  :icon_idea:


Final version might add 2 extra in-/out-put transistorz for bufferz...
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 16, 2014, 05:33:40 PM
B.T.W.: DrAlx,
I really dig your concept of "approaching modulation",
and that`s why I want you to get rid of the hindering hetero-crap
that is limiting your idea too much!
You gotta get over the (zero-) hump...  :icon_smile:
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 17, 2014, 03:07:50 AM
I like sine-LFOs for modulation because of non-tickability,
and sparing an extra any-wave-to-sine-wave-conversion...
Here is where my lack of experience shows.  I wanted a sine wave oscillator but have only ever built one using OTAs (from the LM13600 datasheet).
If I could find a design for a simple amplitude stable sine wave LFO (with low part count) I would use it for sure.
I only used the triangle to sine approximation because I went with what I new.
The problem with what I have is that the amplitude of the "sine" wave increases as the Rate pot decreases which is why the sweep can't be set up to give "touching sine wave bottoms" at all rates.  If there's a sinusoidal LFO that maintains its amplitude at different rates then that would be great.

http://experimentalistsanonymous.com/diy/Schematics/Oscillators%20LFOs%20and%20Signal%20Generators/Sine%20Wave%20Quadrature%20Oscillator.pdf
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 17, 2014, 03:53:00 AM
Thanks Stephen. Looks like an OTA based phase-shift oscillator.  Is the section with all the diodes doing some sort of amplitude control?
The OTA phase-shift oscillator I have already built could go up to 30kHz no problem but was very unstable as soon as you got down to low frequencies (say under 100Hz)  and would be no good for this flanger.   I can't tell if the one in the link would have the same problem.
Just to be clear about amplitude stability, I need amplitude to be stable in time but more importantly the same value amplitude at all frequencies of interest.T
To me, that implies that there must some kind of reference voltage level in the circuit (is that what the zener is all about?)

For the square/triangle oscillator, the "reference voltages" are the top and bottom supply rails that get hit by the square-wave.
I was hoping that would give constant square-wave amplitude, and so constant triangle wave amplitude, and so constant sine-wave amplitude.
That didn't turn out to be the case :(  The supply voltage on the LFO is 8.36 at low LFO frequencies and 8.19V at high LFO frequencies.
So when I first mentioned trying to improve the LFO by "regulating" it, I was actually referring to making sure the square wave always hits the same top and bottom values so that the sine wave has a reproducible minimum value.

Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 17, 2014, 07:39:18 AM
something wrong with the powersupply....
("daisy-chained"...)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 17, 2014, 07:45:00 AM
More musings on the theme(-s):
square wave to sinewave converter (http://www.diystompboxes.com/smfforum/index.php?topic=33027.0)
Quad Triangle LFO (http://www.diystompboxes.com/smfforum/index.php?topic=39811.msg284741#msg284741)
A/DA Flanger does TZF? (http://www.diystompboxes.com/smfforum/index.php?topic=49929.0)
 [ ? ] Continuously variable phase (http://www.diystompboxes.com/smfforum/index.php?topic=72676.0)
Let's talk about opamp LFO's (http://www.diystompboxes.com/smfforum/index.php?topic=81072.msg671323#msg671323)
...
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 17, 2014, 08:34:28 AM
something wrong with the powersupply....
("daisy-chained"...)
I had a similar thought but wasn't sure exactly what was causing the drop on the LFO supply.  I thought maybe the 470uF supply cap was somehow working as a better store of power at lower LFO frequencies and not so much at high.   Also, one of the things I did several weeks ago was measure the voltages between the tips of those 10R resistors on the supply lines so I could work out the current draw and hence power consumption as the power went down the daisy chain.
I can't remember the actual figures, but it was around 30mA in total for the pedal.  The LFO was the lowest (I think around 5mA).  The audio and VCOs powers were roughly the same size, with the VCOs a little larger I think.  I had a hunch that the VCOs were sucking power and affecting the LFO, so I tried feeding in power at the LFO side of the daisy chain rather than the audio side.  I can't remember if this really helped.  Part of the problem is I'm spending far too many late nights on this, so I mentally I am not as sharp or organised as I should be.
I'll give the power supply reworking another go on my current board, and do some reading around the subject of LFOs, but the heterodyning is my priority.
BTW, I tried a cut in the ground plane and it didn't help.  I'll definitely need to test things with an off-board VCO so I can experiment properly with the supply scheme and see how physical separation affects heterodyning.   I'm sure I'll crack this in the end and I'm not one to give up on a problem, but I have little time to do all this 'cos of my regular job, so progress will probably be slow.


Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 18, 2014, 05:30:39 PM
At least one problem solved (or solveable) now :)  
The sweep can reliably hit the zero point without crossing it for all settings of Rate and Depth.
Puretube was correct, the daisy chain power supply scheme was the problem.  
I just tried feeding power in at the other end of the daisy chain and the sweep was good.   So reworking the power supply to tackle the heterodyning will fix the sweep too.
I had tried feeding in power at the LFO end of the daisy chain before (to see if it helped with the heterodyning, I think) but didn't bother to check the sweep.  So just that heterodyning problem left to tackle.

Edit:  and one more thing...
I just discovered that the hex buffers for the clock were not in fact buffered.  Turns out I had CD4049UBE chips in there.  Which makes me ask why the data sheet for the CD4049UBE calls them inverting buffers?  Are there buffered buffers and non-buffered buffers?  What the buff ?!?!

I only found out my mistake when I was reading one of the other threads and noted R.G. emphasizing the "B" suffix when referring to them.
I was wondering why the clock wave form was looking a bit rounded compared to one of my previous builds.  Just swapped them for CD4049Bs from my other build and what a difference.  Much more clarity now.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 19, 2014, 02:40:27 AM

Edit:  and one more thing...
I just discovered that the hex buffers for the clock were not in fact buffered.  Turns out I had CD4049UBE chips in there.  Which makes me ask why the data sheet for the CD4049UBE calls them inverting buffers?  Are there buffered buffers and non-buffered buffers?  What the buff ?!?!

I only found out my mistake when I was reading one of the other threads and noted R.G. emphasizing the "B" suffix when referring to them.
I was wondering why the clock wave form was looking a bit rounded compared to one of my previous builds.  Just swapped them for CD4049Bs from my other build and what a difference.  Much more clarity now.


That's strange - or maybe not. It never made any difference with my ADA Flanger whether I used 4049UBE or 4049B that I can recall.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 19, 2014, 03:04:44 AM
That's strange - or maybe not. It never made any difference with my ADA Flanger whether I used 4049UBE or 4049B that I can recall.
I'm going to have a go at hacking in Puretube's changes on the +ve supply line.  I'll do a recording of the sounds with the UB and B chips to better A/B the difference.  The clock waveforms are noticeably sharper with the B chip.  When I used a scope on the UB chip, I could see sharp clock edges on all the output pins except for the those connected directly to the BBD (which were noticeably rounded off).  The B chip pins showed sharp clock edges on all the output pins.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 19, 2014, 02:11:57 PM
That's strange - or maybe not. It never made any difference with my ADA Flanger whether I used 4049UBE or 4049B that I can recall.
I'm going to have a go at hacking in Puretube's changes on the +ve supply line.  I'll do a recording of the sounds with the UB and B chips to better A/B the difference.  The clock waveforms are noticeably sharper with the B chip.  When I used a scope on the UB chip, I could see sharp clock edges on all the output pins except for the those connected directly to the BBD (which were noticeably rounded off).  The B chip pins showed sharp clock edges on all the output pins.


I wonder if you would notice any difference when battling against a drummer & bass player - or/perish the thought......a keyboard player??
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: Fender3D on June 19, 2014, 02:34:46 PM
I wonder if you would notice any difference when battling against a drummer & bass player - or/perish the thought......a keyboard player??

Lol
maybe you'd better carry on with your heterodyning flanger, sooner or later they'll stop playing against you...  :icon_mrgreen:
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 19, 2014, 04:55:24 PM
Is there a Photoshop (or other imaging software) trick for converting a PCB pattern as if it is viewed from the component side?
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 19, 2014, 05:35:02 PM
Easier I suppose to print on to transparency film. I want to draw 4046/3102/BBD circuit from the Bergfotron delay.

http://hem.bredband.net/bersyn/VCF/vcd.htm
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 20, 2014, 03:04:24 AM
Is there a Photoshop (or other imaging software) trick for converting a PCB pattern as if it is viewed from the component side?
I just mirror the image (i.e. flip it horizontally L<->R).  Most packages or image viewers let you do that.

EDIT: And while we're on the subject of mirroring stuff.  I was trying to work out how the FoxRox Paradox works and someone posted some nice detailed photos of the front and back of the board on one of the other forums.  Problem is they were not plan views.  So I loaded the photos into a graphics package and
1) Corrected them for perspective (so they had vertical sides)
2) Mirrored the back view so it became an X-ray from the component side.
3) Rescaled them so all the traces lined up with the components.  
I could then put the two images on top of each other and fade between them so I could see which tracks went where.
That's how I worked out that the Paradox just ties the two outputs together on each BBD, and doesn't do any sort of capacitor smoothing on either the Vgg voltage for the BBD or the bias voltage for the BBD.
Here are links to the results...
http://i1368.photobucket.com/albums/ag185/DrAlx/foxrox_paradox_warpA_zps69b32d89.jpg
http://i1368.photobucket.com/albums/ag185/DrAlx/foxrox_paradox_warpB_zpsc30b444c.jpg
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 20, 2014, 04:48:51 PM
:icon_biggrin:    :icon_biggrin:    :icon_biggrin:    :icon_biggrin:   HETERODYNING GONE + LFO FIXED !!!
Puretube you are a STAR!!!  Thank you.


I just hacked in the reworked supply as suggested (removed daisy chain) but had to leave the ground plane in place.
I used long wires on the back of the board and split the supply 4 ways with a 10R +470uF on each of the 4 sections...
i.e.
   1) Audio ICs (note that I  left BBD chips powered using the audio supply as it would have been too messy to redo them)
   2) VCO/clock buffer 1
   3) VCO/clock buffer 2
   4) LFO

I put a 100 nF on the main 470uF power cap (the common connection point) but didn't bother with 100nF across the other 470 uFs.

If I turn up the gain on the digital multitrack recorder (to model a high gain amp) and use headphones, then I can pick up very faint heterodyning noise buried deep in all the other regular hiss and crap which is much louder.  So it is gone for all practical purposes.
I tried removing the caps at the BBD inputs to see if they were necessary, and yes they were.  When I took them out the heterodyning came back.

So there are bunch of things for me to do now:

1) I want to try build it with 4 ground sections for symmetry between both supply rails.
I want to build it on vero WITHOUT ground planes.  If I can do that and pull it off successfully, then it will make for an easier vero build for everyone else who want to give this circuit a try, and the conversion from vero to single-sided PCB layout will be a no-brainer.

2) I also want to lower the part count.  So before the vero build, I am going to gradually butcher the current build, starting with the active filter before the BBDs.  Then the active filters after the BBDs.  I will probably leave the rest of it, but am curious to know how much effect my other fixes (i.e. a cap on the base of the current source transistors) are still doing something useful.


Watch this space...


Now time for some beers.


Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 21, 2014, 08:05:23 AM
part count: throw out IC9 & 12: save 32 holes...
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: 12Bass on June 21, 2014, 08:15:40 AM
Nice detective work!  Will continue to watch your progress.....
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 21, 2014, 08:39:29 AM
part count: throw out IC9 & 12: save 32 holes...

No - clock buffers to the younger generation are like "go faster tape" on a car in our day!!! Remember that??
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: Fender3D on June 21, 2014, 09:06:25 AM
part count: throw out IC9 & 12: save 32 holes...

No - clock buffers to the younger generation are like "go faster tape" on a car in our day!!! Remember that??

Thank God,
I guessed I was the only "elder kid" building a flanger without clock buffers...

Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 21, 2014, 10:07:17 AM
I'll try removing those ICs and jumper some wires between the empty socket holes.
If the waveforms at the clock pins still look sharp then great.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 22, 2014, 12:17:31 PM
Update on my further tests / butchering process.

Removal of pre-BBD Sallen-Key LPF:  I hacked in a toggle switch so I could short out the pre-BBD Sallen-Key LPF and do an A/B comparison with/without.
 Result: Audio is the same without the Sallen-Key but has more hiss (although not excessive), and you could always spin that as more clarity.
 When I turned up the gain on my recording box,  I noticed the residual heterodyne noise is even quieter without the Sallen-Key than with it.
 So I think it is definitely worth removing that Sallen-Key filter.

Effect of tying together the BBD output pins:  I wanted to confirm what Puretube was saying for myself, so I took another one of my builds that has separate resistors on the BBD outputs.  I zoomed in on the clock noise on the output wave form and saw it increased a lot when I shorted the 2 BBD output pins together.  Lesson learned.

Effect of clock buffers:  The waveform at the clock pins is definitely not sharp without the buffer chip, and the rise/fall times are outside the 500nS spec of the MN3207 datasheet.  But it still works without the buffers, so what about the sound?
I did a test using another one of my 3207 builds because I could easily flick a switch on it to just hear the delay line by itself (not mixed with anything else).  I recorded with a clean guitar with the sweep switched off and the clock maxed out (at around 800kHz at the clock pins).  I was expecting the buffers to give clearer or louder treble, but when I did an A/B comparison between my recordings it was hard to tell if any change in sharpness was due to my playing or the buffers.  So based on that one test I'd say the difference is marginal although it was hard to do a proper comparison of volume levels the way I did the test.  When I have time I'll have a go at measuring the BBD frequency response with/without buffers, just because I'd like a less subjective measure of the actual difference.

 


Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 24, 2014, 10:15:29 AM
I have a question regarding the differing ways of tying the BBD outputs together.
I've seen that tying the outputs together gives more clocking noise than separating them with some resistance.
On one of my other builds, the BBD outputs are hooked together something like this...

Code: [Select]
Out1---5k---+
            +--------+
Out2---5k---+        |  
            |       680pF    
           50k       |
            |       Gnd
           Gnd  

I can see no clock glitches when I look at the audio waveform at the top of the capacitor, so I don't think it will help me to replace those 5k resistors with a trim pot since my simple scope won't help me set things up to improve on what is already there.  So I am probably going to use fixed resistors.

Is there some advantage/disadvantage to using the above 3 resistor scheme compared to the following 4 resistor scheme (similar to what PureTube described apart from the trimpot). i.e.

Code: [Select]
Out1---+---5k---+
       |        |
      100k      |
       |        +------+
      Gnd       |      |  
                |     680pF  
Out2---+---5k---+      |
       |              Gnd
      100k
       |        
      Gnd        

I can see similarities:
The resistance between BBD outputs is 10k in both cases.
Each output gets acted on by (5k + 680pF) LPF.
Each BBD output has roughly the same impedance to ground: 55k in one case and 52.38k (= 100k || 110k) in the other.

I also see this difference:
The first scheme attentuates the signal by ( 50k/55k )  = 0.4 dB while the second doesn't.

Is this attentuation (and one less resistor) the main difference between the two schemes, or is there something else that I have not considered?
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on June 24, 2014, 11:05:52 AM
If you are referring to the two outputs of a single BBD, the better way to do it from what I've seen is to use a trimmer between the two outputs so that you may "dial" the output in with a scope to "superimpose" one output on top of the other to remove clock glitches.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 24, 2014, 08:42:07 PM
I have a question regarding the differing ways of tying the BBD outputs together.
I've seen that tying the outputs together gives more clocking noise than separating them with some resistance.
On one of my other builds, the BBD outputs are hooked together something like this...

Code: [Select]
Out1---5k---+
            +--------+
Out2---5k---+        |  
            |       680pF    
           50k       |
            |       Gnd
           Gnd  

I can see no clock glitches when I look at the audio waveform at the top of the capacitor, so I don't think it will help me to replace those 5k resistors with  trim pot since my simple scope won't help me set things up to improve on what is already there.  So I am probably going to use fixed resistors.
EDIT:  Actually I just retested and I can in fact see the glitches but found that using a 10k trimpot instead of fixed 5k's didn't improve things.

Is there some advantage/disadvantage to using the above 3 resistor scheme compared to the following 4 resistor scheme (similar to what PureTube described apart from the trimpot). This is the sort of arrangement in the MN3207 datasheet...

Code: [Select]
Out1---+---5k---+
       |        |
      100k      |
       |        +------+
      Gnd       |      |  
                |     680pF  
Out2---+---5k---+      |
       |              Gnd
      100k
       |        
      Gnd        

I can see similarities:
The resistance between BBD outputs is 10k in both cases.
Each output gets acted on by (5k + 680pF) LPF.
Each BBD output has roughly the same impedance to ground: 55k in one case and 52.38k (= 100k || 110k) in the other.

I also see this difference:
The first scheme attentuates the signal by ( 50k/55k )  = 0.4 dB while the second doesn't.

Is this attentuation (and one less resistor) the main difference between the two schemes, or is there something else that I have not considered?

Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on June 24, 2014, 09:47:41 PM
If you are referring to the two outputs of a single BBD, the better way to do it from what I've seen is to use a trimmer between the two outputs so that you may "dial" the output in with a scope to "superimpose" one output on top of the other to remove clock glitches.

I did read your post Alex, and I replied when no one else did...what I feel is the best solution.

It is common knowledge that BBDs exhibit slightly different characteristics from unit to unit. It is a common occurrence to have to re-bias a circuit that has already been "aligned" when a different BBD is installed. With that being said, I prefer to include a trimmer to balance the BBD output rather than leave things to chance.

If you are building a one off circuit and everything looks great....then fine. If you are working up a project where old stock BBDs from various sources are to be used, then I would design for worst case scenario.

Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 25, 2014, 12:44:27 AM
I agree with Larry.  There is an old Philips circuit designed to increase signal to noise on TDA 1022 connected in series for longer delay, which may be of use if I can locate it. It's 5.30 am here and I've just been woken up by a very loud moped - back to sleep!!

Voila!
https://www.dropbox.com/s/asosgxw7q44tfit/seriesdelay.doc
https://www.dropbox.com/s/a7aplq185hy722z/TDA1022_c%5B1%5D.jpg``
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on June 25, 2014, 02:50:52 AM
Where do you get these things from Stephen?

Thanks...another one for the BBD files.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 25, 2014, 03:08:40 AM
Where do you get these things from Stephen?

Thanks...another one for the BBD files.

This one I got from a Philips office in London way bach in the 1980s. I called them to see if they would let me have a TDA1022 sample, the guy asked me to call in that day and gave me 10 of them with the circuit just posted, which I built - on veroboard of course!!
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 25, 2014, 04:55:55 AM
page2... (http://www.cjlectronics.com/tech_info/bucket_brigade_info)

BBDementia courtesy Mark Hammer... (http://hammer.ampage.org/files/BBDementia.zip)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 25, 2014, 12:05:30 PM
Thank you all for your replies :)  My problem is I'm trying to juggle a few conflicting requirements in doing this new vero layout.
On the one hand I want to minimise part count and simplify things, but making some of these improvements will increase the part count.

Stephen's link is interesting for 2 reasons.  One is that all BBDs are given the same bias level.   The only other example I've seen of that is in the BYOC Flanger.
Also, I think I read a post by Mark Hammer mentioning he'd used a single bias level for multiple BBDs and that you can often get away with that (presuming the BBDs have the same supply voltage).  I'm therefore inclined to leave the bias scheme as it is because it saves me adding more components and coupling caps to the BBD inputs. 
I'm aware that the optimal bias level will vary from device to device.  So Larry, when you say that changing a BBD can mean you need to re-bias, do you mean that you need to do that because the optimal bias level has changed (i.e. it's not an audible difference, but you can see the difference when you go through the bias procedure with a scope), or do you need to rebias because the new BBD bias point is so far from the old that you get noticeable clipping if you don't rebias?
The reason I ask is that I'm not concerned (at the moment) about tweaking every BBD to its optimal bias voltage, because I've seen that there's actually a small range of bias voltages that let the BBD work OK without clipping the guitar signal. All I need is for there to be an overlap between the range of OK bias levels for the two BBDs.  I've got around a dozen MN3207 to experiment with and I'm hoping that once I've set a single bias level, changing ICs will still keep things working OK with no clipping.

The other interesting thing from Stephen's link is that only the last BBD in the chain gets a trim pot to balance its clocking noise at the output.  All the other ones just have the inputs tied together, (presumably because using resistors there is worse for S/N than using a current sink) ?  I've also seen that many pedals don't bother with any sort of BBD output trimpot (Original EM, MXR 117, Morley Flanger, Foxrox Paradox TZF, Boss CE-2, Boss DC-2) while other ones do (Deluxe EM, A/DA Flanger, Flanger Hoax).
I can see how manufacturing differences and ageing affects can change the bias requirements of one IC versus another, but is there really a big difference between the two sets of buckets within the same IC?  I am inclined to do the vero in such a way that gives the builder the option of using either fixed resistors or a trim pot at the BBD output.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: Fender3D on June 25, 2014, 02:03:11 PM
Central part of "misbiasing" will be just a level dropping, the rest of misbiasing will be clipping, then no more signal at output...  :icon_wink:
Notice that you should need rebiasing even when varying Vgg

...The other interesting thing from Stephen's link is that only the last BBD in the chain gets a trim pot to balance its clocking noise at the output.  All the other ones just have the inputs tied together, (presumably because using resistors there is worse for S/N than using a current sink)

You'll null clock by mixing 2 clock signals out of phase each other, then ,since BBDs are in cascade, you can null just @ the last output (unless any previous stage is way out of balance...)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on June 25, 2014, 02:05:23 PM
Alex,

First let me say that I've been following this thread with great interest! This is quite an undertaking.
If I wore a hat..it would go off to you!

So Larry, when you say that changing a BBD can mean you need to re-bias, do you mean that you need to do that because the optimal bias level has changed (i.e. it's not an audible difference, but you can see the difference when you go through the bias procedure with a scope), or do you need to rebias because the new BBD bias point is so far from the old that you get noticeable clipping if you don't rebias?

I have experienced changing a BBD and the bias being so far off for the new device that no signal would pass. This was with different SAD1024s. My experience with the MN series (the pieces that I've tested) is that the bias requirement does seem to be closer.

I've got around a dozen MN3207 to experiment with and I'm hoping that once I've set a single bias level, changing ICs will still keep things working OK with no clipping.

You may find that this batch is similar in characteristics/bias requirements, but another group manufactured at a different time/place might be different. And let me add, if one were to use the Belling BL3207 or the Cool Audio V3207D, again, you might obtain different results.

I built an AD-3208 (with two 3205s) for a friend's son, Austin. The AD3208 was designed by Scott Swartz and is a mix of an Ibanez CD-10 and a Boss DM-3. The AD-3208 is powered by 9 volts and incorporates a 78L05 regulator to power the BBD. I had previously built a Ibanez AD-80 which is powered by 12 volts for myself.

When I finished the AD-3208 build, I calibrated it and was surprised at the amount of distortion I heard, but chalked it up to a lower headroom effect. I had never played through an original effect using low voltage BBDs, so I had nothing to gauge the distortion amount with except my AD-80.

About a year later, a friend of Austin's wanted me to build him an AD-3208. When I completed the build...I listened to the amount of distortion, and thought....this is not acceptable! this can't be right!

After some research on the net, It seemed that other builds exhibited this issue, so I started a thread on this forum.
Brian from Madbean had been dealing with this issue with members from his site, so with a few suggestions, I started to hack on the board, drilling holes, adding resistors and the like.

It turns out that the V3205Ds I was using output a "hotter" signal than the MN3205! The AD-3208 circuit didn't have any way to accommodate for that. The Ibanez AD-900 has a level adjustment trimmer in between it's two series BBDs.

JD Sleep from General Guitar Gadgets ran across the "fix" thread and PM'd me for the info. I sent him my files so that he could update his AD-3208 project with the "fix"

Sorry for the long story but....I wanted to outline that BBDs can exhibit different characteristics. They do not seem to be cookie cutter replicas of one another.

I've also seen that many pedals don't bother with any sort of BBD output trimpot (Original EM, MXR 117, Morley Flanger, Foxrox Paradox TZF, Boss CE-2, Boss DC-2) while other ones do (Deluxe EM, A/DA Flanger, Flanger Hoax).
I can see how manufacturing differences and ageing affects can change the bias requirements of one IC versus another, but is there really a big difference between the two sets of buckets within the same IC?  

I would imagine that production costs, including components and calibration time, has set a standard of what is acceptable.
It could also be that if a BBD device doesn't meet the criteria in a circuit that lacks adjustment, it is "tossed" in a box for a circuit that does include adjustment.

Example:
MXR M-117 no output trimmer.
MXR M118 (3) SAD1024s in series, output trimmer at last BBD output.

Another theory is: distortion is more acceptable (not as noticeable) in a flanger than in an analog delay. In fact, distortion may add to the "flavor" of a flanger.  :icon_wink:



Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 25, 2014, 02:38:50 PM
That one glitch you don`t cancel at the output of the first of a few cascaded BBDs,
will ride on top of the audio into the next one and appear delayed at the output of that one. Now cancel that...
(or will it be that synchronized that it really does disappear by balancing that last BBD only?)

And how about the accumulating variable DC-pedestal?

More details to be found in BBD-related patents...


BTW.: tube-filament supply can be grounded on either side,
or centered fix,
or may be balanced with an anti-hummer pot - it all worx...   :icon_wink:
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 25, 2014, 03:22:13 PM
BTW.: there were experiences in this very thread, that the PS-voltage varied with the rate (in an LFO...)
same goals with CMOS-clocked (BBD-) circuits: current-demand rises at higher frequencies...

If now the Vdd for that BBD-circuit runs through a dropping series-R, the voltage will drop...
the bias will drop...
the headroom will drop coz Vdd is less, and coz the signal-room around the bias-voltage is less,
or less centered...

If now the modulation-LFO-rate is fast, the BBD-clock spends it`s time in the high-frequency region more often,
cauzing higher current-demand more often IYKWIM...

Now throw that reduced possible headroom into the next BBD, and experience above scenario in accumulated continuation...
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 25, 2014, 03:36:16 PM
B.T.W.: DrAlx,
I really dig your concept of "approaching modulation",
and that`s why I want you to get rid of the hindering hetero-crap
that is limiting your idea too much!
You gotta get over the (zero-) hump...  :icon_smile:

"snap" seems to have anticipated a similar concept... (http://www.diystompboxes.com/smfforum/index.php?topic=72676.msg588899#msg588899)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 25, 2014, 04:21:43 PM
So it seems I could get away without the extra trimpots (at least for the 2 BBDs that I've got) but should really include them if I want to be able to handle possible variability in BBDs.
Given that I'm not going to be able to fit the vero in a 1590BB anymore :(  then I could let the board size increase to allow the option of biasing BBDs locally instead of via the audio path.   I'll probably still bias via the audio path on the next build because my main aim is to see if I can build this on vero (with no ground plane) and avoid heterodyning.
OK, I've got enough info to carry on with this.  Thank you all again.


Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 25, 2014, 04:34:23 PM
So it seems I could get away without the extra trimpots (at least for the 2 BBDs that I've got) but should really include them if I want to be able to handle possible variability in BBDs.
Given that I'm not going to be able to fit the vero in a 1590BB anymore :(  then I could let the board size increase to allow the option of biasing BBDs locally instead of via the audio path.   I'll probably still bias via the audio path on the next build because my main aim is to see if I can build this on vero (with no ground plane) and avoid heterodyning.
OK, I've got enough info to carry on with this.  Thank you all again.




Let not the 1590 police be sharpening their tongues!!!
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 25, 2014, 04:47:24 PM
Save on drill-bits: go SMD...
(spares dozens/hundreds of holes...)


apropos holes, Stephen: remember "Hole In My Shoe" (http://www.youtube.com/watch?v=a77yHpjdUtU)?
[be it with, or without TZF, it was mind-blowing, at that time...]


[edit]: but then again, I`m just a little Tin Solderer (http://www.youtube.com/watch?v=6vWTtx_PxPo)
caught in Itchycoo Park (http://www.youtube.com/watch?v=14ViwvgtvbA)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 25, 2014, 05:17:33 PM
Quote
"snap" seems to have anticipated a similar concept... (http://www.diystompboxes.com/smfforum/index.php?topic=72676.msg588899#msg588899)
It's not the same but I can see one similarity.  My LFO sine waves have the exact same rate and phase all of the time.  They just have different amplitudes.

"snap" talks about having two identical LFOs with adjustable LFO phase difference.   To me that suggests having fixed rate sine waves, but varying phase rather than amplitude.  The one similarity I see is that at some point you can have two LFOS that have exactly the same amplitude and phase, but its reaching that situation in a different way.

In any case,  the only reason I took the approach I did was because I was trying to find a simple reliable trim procedure to put the zero at the end of the sweep.
If I had gone the usual route of having a varying delay in one path (lets call is sine wave) and fixed delay in the other then the trim procedure would have gone like this...

1) Set the sine wave to minimum amplitude (i.e. depth pot at minimum)
2) Trim the fixed delay so that the zero occurs at the bottom of the sine wave (already a real PITA).
3) Increase the sine wave depth (lets say to maximum).
4) Oh no, the zero point isn't at the bottom of the sweep anymore !!!
    That means the sine wave has a different minimum value to before.
    That means the "offset" trimpot was set wrong.  
5) Try a new value of the "offset" trimpot and go back to 1).

Of course you could speed up this process by first trying to set the "offset" trimpot using a scope (i.e. try give the sine wave the same minimum value at both maximum and minimum depth) but I think that would be a real PITA too.
I then had a brainwave when I realized that I could use a sufficiently low amplitude sine wave as a reference in the other path (instead of a fixed delay) and that got rid of the whole mess of trying to "catch" the zero point at the end of the sweep, because you could trim things so that it was at the zero point for ALL of the sweep.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 25, 2014, 05:19:34 PM
Save on drill-bits: go SMD...
(spares dozens/hundreds of holes...)


apropos holes, Stephen: remember "Hole In My Shoe" (http://www.youtube.com/watch?v=a77yHpjdUtU)?
[be it with, or without TZF, it was mind-blowing, at that time...]


[edit]: but then again, I`m just a little Tin Solderer (http://www.youtube.com/watch?v=6vWTtx_PxPo)
caught in Itchycoo Park (http://www.youtube.com/watch?v=14ViwvgtvbA)
Being a teenager in the 80s, I don't remember the original but do remember the cover in the UK by Neil from "The Young Ones".
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 26, 2014, 02:43:10 AM
Dr
Save on drill-bits: go SMD...
(spares dozens/hundreds of holes...)


apropos holes, Stephen: remember "Hole In My Shoe" (http://www.youtube.com/watch?v=a77yHpjdUtU)?
[be it with, or without TZF, it was mind-blowing, at that time...]


[edit]: but then again, I`m just a little Tin Solderer (http://www.youtube.com/watch?v=6vWTtx_PxPo)
caught in Itchycoo Park (http://www.youtube.com/watch?v=14ViwvgtvbA)
Being a teenager in the 80s, I don't remember the original but do remember the cover in the UK by Neil from "The Young Ones".

And the drummer on Ichycoo Park lives near you DrAlx in Ewhurst Green - he owns Hurtwood Park Polo Club where we are members!
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on June 26, 2014, 03:05:52 AM
A thought came to me whilst throwing a ball for our dog just now - Barberpole TZF - now that would be something!! Come on EH, you can do anything after the B9 pedal!!
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 26, 2014, 04:52:08 AM
A thought came to me whilst throwing a ball for our dog just now - Barberpole TZF - now that would be something!! Come on EH, you can do anything after the B9 pedal!!
Interesting idea.  First thought that comes to mind is what's the minimum number of delay lines needed to pull that off, and how do you make sure that you ignore the downward slopes of the sweeps and keep only the upwards ones.  i.e. the mix ratio between the various delays needs to smoothly vary too.

EDIT:  Actually having thought about it more I am not sure it is even possible.  
Let's say you have a fixed delay line of 1ms and 4 other sine wave LFOs in quadrature that each gives a varying delay from 1ms to 5 ms.
Each of those sine waves would give you a through zero effect at 1ms (when mixed with the fixed delay).

As I understand it, the barberpole thing involves the sweep only ever appearing to go in one direction (lets from the 5ms point to the 1ms point).
So you would need to fade out the flange effect from each sweep as it approaches its 1ms point and leave it faded-out before fading it back in again when it reaches its 5ms point and starts to move back towards 1ms.  i.e. you only want the bit of the sine wave that slopes downward from 5ms to 1ms.
So the problem is that the sweep will be faded out before it ever reaches the zero point at 1ms.  So you never get to hear the zero.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 27, 2014, 12:54:12 PM
New vero layout almost done.  Just fussing now and trying to make things tidier.

I've been thinking about the 4046 as an alternative VCO to get the part count down.  Maybe not in the next vero build, but certainly if I do a new version of the flanger at some point in the future.
The 4046 has the wrong sort of voltage to frequency characteristic compared to what I have at the moment for two reasons.

1) In the 4046 , the CV causes frequency to increase rather than decrease.  So my touching sine wave bottoms would cause the zero point to occur when both delay times were at there largest.
I'd need to rework the CV circuit to give touching sine wave tops instead.

2) The 4046 causes frequency to change linearly with V rather than like (1/V) which is what I have at the moment, and what I would prefer since it gives me sinusoidal delay variation (better for the fast Leslie style effect).

I am looking at ways of warping the CV (I think the UltraFlanger does something along those lines with diodes at the LFO output) but am also wondering
if it is really necessary?  For small amplitude changes in CV, I may still get roughly sinusoidal variations in delay, and at the other extreme any big slow sweeps may not be worth worrying about.
So maybe I don't need to warp things.

There is one other potential advantage (apart from reduced part count) that I can see from using a 4046:

With my current VCO, the clock trim pot alters the charge rate of the clock capacitor.
This changes the gradient of the CV to frequency characteristic.  It may slightly alter the intercept too but I haven't checked.
So you only have one control parameter to play with when altering the characteristic of the VCO.

Using a 4046 would allow two dimensions of control via resistors on pins 11 and 12.
The resistor on pin 11 lets you alter the charge rate for the clock capacitor (i.e. gradient of the characteristic) and the resistor on pin 12 lets you control the intercept.
So although the 4046 CV to Frequency characteristic is different to the current LFO, it should be possible to do an even better job of matching the two VCO characteristics than I have at the moment.
Still not clear if both levels of control are needed, but its nice to know they are available.

Any advice/stories from people who've used one of these chips would be appreciated.  I  have read people have had difficulties with their UltraFlanger builds.

Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on June 27, 2014, 01:58:00 PM
Hey Alex,

I haven't experimented with the 4046 much, (yet) but I did produce a clone of the Mutron Flanger that uses this IC for the clock.

Scroll down for the project file PDF.
http://www.diystompboxes.com/smfforum/index.php?topic=104959.0

The Mutron switches the 4046 VCO input between the LFO and a LED/LDR pedal controlled voltage source.

The LFO is unique in having stop/start controls which move the sweep points up and down instead of the standard manual and depth controls.

One thing that I like about the 4046 is the ease of incorporating a CV input.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 27, 2014, 05:41:07 PM
Cheers Larry.  Just took a quick look.  That's quite an LFO!!!  I don't understand what the block with the LED's above the main square/triangle LFO is doing, but the opamps on the right with the diodes look like log and anti-log amplifiers, so I'm guessing the wave is begin warped to give the CV.
BTW your Muton Flanger clone sounds great and the pedal control is VERY cool.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on June 27, 2014, 06:10:40 PM
I don't understand what the block with the LED's above the main square/triangle LFO is doingBTW your Muton Flanger clone sounds

Thanks for the compliment Alex. I may lack knowledge, but I have an overabundance of tenacity.  :icon_wink:

The section that you were referring to is actually a smart design.
When the Pedal/LFO switch is in the LFO position, a rate LED is activated. When the switch is in the Pedal position, the rate LED goes out, a LED by the switch goes on indicating Pedal mode, and the LFO is stopped.

Great care was taken in this design to make sure that it was quiet. There is a noise gate, compander, and having the LFO shut off while in the Pedal mode ensures that no residual LFO noise will be introduced into the circuit.

Another thing about this circuit....this is one of the best sounding flangers that I've heard. This flanger doesn't produce that tell tale metallic sound that's inherent in most flanger designs. The Mutron has a very rich tone.

Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 28, 2014, 09:16:53 AM
Larry, I was just flicking through those build instructions of yours and saw the nice scope pictures of the effect of trimming at the BBD outputs :)
I only have a simple hand-held, single-channel scope with LCD output, so I can't get anything like the detail in those pictures.
So I have quick question for you.  In the picture where the output is unbalanced, can you remember how things were set up to get that picture.
Did you put the trim pot as far away from balanced as possible?  And when you had optimally trimmed things, how close to a 50:50 ratio were the two halves of the trim pot?  I'm trying to get an idea of how bad things are if you just use a couple of equal resistors.

The new vero layout is basically done (33 strips with 39 holes per strip).  I still need to calculate/simulate some filter stuff so not all component values have been decided, and I need to do a thorough check of the layout again before I start the build.

I've allowed for the option of using separate BBD bias levels (i.e. I've put in the tracks for the extra components).

I haven't yet included the option to allow a trimpot at each BBD output though, which is partly why I've brought this up again.  I could include the trimpots by default, and there is enough space on the layout to give the user the option of removing those tripots and using a couple of resistors instead.  But they'd be standing resistors.  Yuck.

Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on June 28, 2014, 11:12:54 AM
I only have a simple hand-held, single-channel scope

Only one channel is needed to adjust the balance. Connect single probe to wiper of balance trimmer which is combined BBD output.

In the picture where the output is unbalanced, can you remember how things were set up to get that picture.
Did you put the trim pot as far away from balanced as possible? 

I honestly do not recall. When I set up a balance trimmer in this fashion, the image that I posted is normally what I first see. The trimmer is always in a random position before calibration.

And when you had optimally trimmed things, how close to a 50:50 ratio were the two halves of the trim pot? 

Once again....I do not recall but, the flanger is within eyeshot. Today I'll pop the bottom off and take some measurements.

But they'd be standing resistors.  Yuck.

Before the advent of SMD components, a group of companies had built their whole product lines based on designs including standing resistors. I use them when necessary.

The Psalm of DIY:

Though I walk through the valley of the shrinking PC board, I fear no resistor, for I know I have standing resistor options. With my pliers and soldering iron in hand I feel comfort...... :icon_wink:
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on June 28, 2014, 05:16:22 PM
Okay...

I took a resistance reading from the "balance" trimmer (T2) of the Mutron Flanger:

lug 1 to the wiper..... 3.1KΩ
lug 3 to the wiper..... 5.7KΩ
Across lugs 1 & 3 ..... 7.9KΩ

T2 is a 10KΩ 20% trimmer.

Now you may wonder why the first two readings add up to more (8.8K) than the total resistance of the trimmer.

So did I.  ???

I took the readings again and looked at the schematic to try to find why I would be getting "false" readings. I kept getting the same readings and I didn't see anything in the drawing that would cause an increase of resistance.

Finally...just to verify...I grabbed a 10KB pot and took the same readings.

lug 1 to the wiper..... 5.4KΩ
lug 3 to the wiper..... 4.5KΩ
Across lugs 1 & 3 ..... 9.6KΩ

Added total of first two measurements 9.9KΩ

So...I got a higher reading adding the first two readings than the second reading with the pot as well. I would call the trimmer readings good.

Seeing that there is a 2.6K difference when the BBD outputs are properly balanced definitely has me sold on using a trimmer instead of resistors.

Edit:
While I was taking measurements, I took a shot of a typical Boss type circuit BBD output. The BBDs two outputs are tied together with a 56K resistor to ground, connected into a .047f capacitor. Notice the "ghosting" of the sine wave. It looks similar to the Mutron BBD output before it was calibrated.

(https://dl.dropboxusercontent.com/u/53299166/DIYstompboxes/Boss%20BBD%20sine.jpg)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 28, 2014, 06:46:52 PM
Thank you Larry for taking the time to do this.  I really appreciate it.
The discrepancy in the measurements is down to 2 things.
In the case when you measured an isolated pot (not connected to anything else) the difference must come purely from errors in the meter.

For the pot in the circuit there is actually another effect. Looking at the schematic, there is a second path for the current to go between your measurements points (i.e. the two 100k resistors with a common ground).

Here's a worked example when you have exact 100k resistors and a 10k trim pot split exactly into 5k and 5K.

Taking a measurement across half the pot, the probe sees parallel resistances of 5k and 205k = 4.88k.
Taking a measurement across the whole pot, the probe sees parallel resistances of 10k and 200k = 9.52k
(Notice that 4.88k + 4.88k = 9.76k).

What if that pot ratio is split into a 6k and 4k ?  If you plug the numbers in you get this...
5.83k, 3.92k and 9.52k .  So we have the same sort of situation where the sum of the two smaller numbers exceeds the big one.
Note that the ratio of 5.83k to 3.92k isn't too far off the ratio of 6 to 4.

So going back to your values, it suggests your trimpot is in the ratio of about 1:2, and definitely nowhere near 1:1.
I'm fully convinced now and I'll put those trim pots in the layout.
I am guessing lots of other circuits get away without a trimmer because they have heavier filtering or the clock noise doesn't cause them a problem.
When you have a circuit with potential heterodyning, I think it makes sense to kill off as much of that clock noise as soon as possible.

Thanks again.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 28, 2014, 07:18:21 PM
yes...
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on June 28, 2014, 09:02:18 PM
I am guessing lots of other circuits get away without a trimmer because they have heavier filtering or the clock noise doesn't cause them a problem.

When I scoped the Boss circuit (sine wave posted) further down the line, after the filtering, the signal had cleaned up considerably.
So yes, I agree with your statement.


I do see the connecting path to +V for the two 100K resistors.

Since I am the inquisitive type, I took a few more measurements and threw a few things on the bread board for verification.

The meter I used for the trimmer measurements was a Fluke 87. I performed further testing with an Extech EX540. Neither meter is a bargain basement meter.  :icon_wink:

First I checked a 25KC pot's resistance:

lug 1 to the wiper..... 19.8
lug 3 to the wiper..... 5.8
across 1 & 3.....24.8

first two measurements summed....25.6

The summed measurement is larger with a different meter.

So I breadboarded a 10KB pot and the two 100K resistors:
lug 1 to the wiper..... 5.4
lug 3 to the wiper..... 4.2
across 1 & 3.....9.2

first two measurements summed....9.6
 
The summed measurement is larger.

Now same measurements with 100K resistors removed:
lug 1 to the wiper..... 5.6
lug 3 to the wiper..... 4.2
across 1 & 3.....9.6

first two measurements summed....9.8

The resistors definitely affected the readings...but kind of proportionately.

I then took readings with two 100K resistors in series using the center connection point as the "wiper" point.

99.88
99.74
across both resistors in series....199.6
first two measurements summed...199.6 (the same as both in series)

Conclusion?
There is nothing wrong with my meter(s)...there is something inherent in the resistance/working of a potentiometer that causes this effect. I'm sure it's tucked away in some ohms law equation.  :icon_wink:

Now on to more through (near) zero flanging!

Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 29, 2014, 08:59:26 AM
There is nothing wrong with my meter(s)...there is something inherent in the resistance/working of a potentiometer that causes this effect.
So it can be only one thing and that is the resistance due to imperfect contact between the wiper surface and the resistive material within the pot.
That will vary as you move the wiper across the surface.
So the measurements that include the wiper pin see an extra resistance (which I've assumed is in series) with the two paths through the pot and circuit.

Going back to your first set of Mutron measurements (3.1,  5.7,  7.9), if you assume the 100k resistors are exact, then the following would explain the result.

Trimmer = 8.23k   (because 8.23k in parallel with 200k gives the measured 7.9k)
Pot ratio = 5.47k :  2.76k.    (These sum to 8.23k).
Wiper contact resistance =  0.374 k.
(I plugged numbers into a spreadsheet to calculate all the above results)

So for one half of the pot, the meter measures 
    0.374k +( 5.47k in parallel with 202.76k)
= 0.374k + 5.33k
= 5.74k       (you measured 5.7k)

For the other half of the pot, the meter measures 
   0.374k + (2.76 in parallel with 205.47k)
= 0.374k + 2.72k
= 3.094k     (you measured 3.1k)


So my next thought is this, and it is related to the filter design for the output of the BBD.
If there is that much potential variation in the R value, then I need to be careful if I want to us that R value as part of an RC LPF on the output.
The Mutron doesn't have that problem because the trimmer output is immediately buffered by a transistor before being filtered.
I'm still going to have active filters on the output but lower order, so I'll need to make sure the variable R value doesn't mess things up.
Another SPICE session is called for,

Title: Re: NEW CIRCUIT DESIGN: NZF Flanger to BARBERPOLE TZF ?
Post by: puretube on June 29, 2014, 11:42:45 AM
A thought came to me whilst throwing a ball for our dog just now - Barberpole TZF - now that would be something!! Come on EH, you can do anything after the B9 pedal!!

Maybe I just shouldave added some dry signal to the Perpetuum Shiftobile... (http://youtu.be/Jf6WpL_e4NI) to get the flange?  :icon_lol:




But then again, above thingy wasn`t that analogue...
(But therefore coulda been stuffed into one of those popular matchbox-boxes (http://www.diystompboxes.com/smfforum/index.php?topic=64752.0)
that want to be operated with high-heel-stilettos...)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger to BARBERPOLE TZF ?
Post by: armdnrdy on June 29, 2014, 01:23:31 PM
Maybe I just shouldave added some dry signal to the Perpetuum Shiftobile... (http://youtu.be/Jf6WpL_e4NI) to get the flange?  :icon_lol:

That sounds great Ton!
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on June 29, 2014, 02:35:02 PM
So it can be only one thing and that is the resistance due to imperfect contact between the wiper surface and the resistive material within the pot.
That will vary as you move the wiper across the surface.
So the measurements that include the wiper pin see an extra resistance (which I've assumed is in series) with the two paths through the pot and circuit.

I happened to have a 50KB pot taken apart for a project that includes my fabricating a center tapped pot....so....I did some poking around and took measurements.

This is an image that I pulled from the web for clarity.

(https://dl.dropboxusercontent.com/u/53299166/DIYstompboxes/pot%20wafer.jpg)

Making the connection between the resistive layer and the conductive layer is a metal piece that is making contact by spring tension.
This parts two points of contact are located 180 from each other.
I took measurements from lug 2 to the point where this part makes contact with the resistive layer. I would get different readings when I moved the wiper. The readings were between 1.5Ω and 2Ω.

*Conclusion....there is a small amount of resistance in both the conductive layer, and the metal spring tensioned piece.
The resistance may also change slightly due to the contact between the metal piece and the imperfect surface of the conductive layer.

*This seemed to make perfect sense until I took measurements of the 50KB pot.

lug 1 to the wiper..... 23.51K
lug 3 to the wiper..... 26.51K
across 1 & 3.....48.85K

first two measurements summed....50.02K

That is a 1.17K difference! I was expecting between 1.5Ω and 2Ω.
So...as I see it there is something else at play here. Even though it has been established that there is a "mechanical" change in resistance, there is something else causing a rise in resistance from the wiper to the outer lugs.

Just to double check with a larger value pot, I measured a 100KB.

lug 1 to the wiper..... 64.56K
lug 3 to the wiper..... 34.66K
across 1 & 3.....97.50K

first two measurements summed....99.22K
difference of 1.72K

So...without checking every pot that I have on hand...it might be safe to say that the difference between the outer lug to wiper summed resistance and the overall resistance may rise exponentially with the value of the pot.

Enough of this! I don't want to sidetrack you.

So my next thought is this, and it is related to the filter design for the output of the BBD.
If there is that much potential variation in the R value, then I need to be careful if I want to us that R value as part of an RC LPF on the output.
The Mutron doesn't have that problem because the trimmer output is immediately buffered by a transistor before being filtered.
I'm still going to have active filters on the output but lower order, so I'll need to make sure the variable R value doesn't mess things up.
Another SPICE session is called for,

Personally..I wouldn't worry too much about including the resistance of the balance trimmer in the filter equation. With 20% trimmer tolerances, 1-5% resistors, and 5-10% capacitors, it is not an exact science anyway. You'll still achieve your goal at the end of the day.

I wanted to mention that the Mutron BBD section in my build is not the original section. Federico (Fender3D) and I worked out a MN3007 retrofit in place of the original SAD1024 in series. (1024 stages)

The buffer was added for the 3007 version due to the difference in output between the two BBDs.

Here is the original SAD BBD section:

(https://dl.dropboxusercontent.com/u/53299166/DIYstompboxes/Mutron%20SAD%20BBD%20section.jpg)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on June 29, 2014, 04:06:33 PM
Quote
*Conclusion....there is a small amount of resistance in both the conductive layer, and the metal spring tensioned piece.
Hi Larry. The resistance that you measured isn't what I was referring to, and I'm not sure if its possible to directly measure the resistance I was describing.
I meant the resistance between the rough metal surface of the wiper and the rough carbon surface of the resistive strip.
i.e. the "junction" between the two materials, although junction is probably the wrong word.
This "contact resistance" is going to be dominated by the resistivity of the material that makes up the resistive strip.  
So all things being equal , I would expect a higher value pot (with less conductive material in the resistive strip) to have higher contact resistance.
All of this isn't really relevant to the build of course, but it's sort of interesting anyway and probably something most people don't think (or worry) about.

I think you're right.  I'm probably being fussy about the filtering.  I just need to make sure that the worst case cutoff still lets through all the audio of interest.

And isn't Ton's "Perpetuum Shiftobile..." totally awesome. 8)

Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on June 29, 2014, 05:04:15 PM
[How To] get rid of wiper-resistance... (http://electronicdesign.com/components/active-cancellation-pots-wiper-resistance)
(if it really bothers too much...)


some manufacturers show Rw in their datasheets, or give a guaranteed Rw-max
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on June 29, 2014, 05:28:09 PM
Thanks Ton!

It looks like there is an equation name for this phenomena...Rw

You were correct Alex. Wiper resistance.

I guess I'll be able to sleep tonight.  ;D
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 07, 2014, 09:44:10 PM
I've put together a new vero build without the ground plane.
I wanted to see if I could get a single sided PCB to work with no heterodyning, so I tried to made the vero follow the PCB layout that I have in mind.
It is NOT a good vero layout as there are way too many cuts and room for error and I wouldn't recommend it to anyone.

Pictures
Mark-up of front and back
(http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8203_zps35bdb44c.jpg) (http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8203_zps35bdb44c.jpg)(http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8205_zps860ec69d.jpg) (http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8205_zps860ec69d.jpg)

Strip breaks and jumpers
(http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8204_zps608f2653.jpg) (http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8204_zps608f2653.jpg)(http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8208_zps0987e096.jpg) (http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8208_zps0987e096.jpg)

Final view of top and bottom
(http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8213_zps7e1ad602.jpg) (http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8213_zps7e1ad602.jpg)(http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8210_zps97cb74ef.jpg) (http://i1368.photobucket.com/albums/ag185/DrAlx/IMG_8210_zps97cb74ef.jpg)


Layout changes to previous build
The two digital sections (VCOs+BBDs) are at opposite ends of the board.
The LFO section (orange and brown wires) and the audio section (all the other wires) are in the middle.
Surprisingly I only had two construction errors (shorts in the LFO section) and I found them quite quickly.


Circuit changes to previous (corrected) build:
1) Star topology for supply and grounds.
2) BBD supplies are separate now (not using audio supply for BBDs).
3) There is only a simple 100k + 100pF LPF at each BBD input (and no Sallen-Key).
4) There is an active 2 pole LPF at the BBD output (instead of 3 pole), and the BBD output pins are not tied together.
I haven't put in the trim pots for separate BBD bias levels (its still a single bias via the audio path) or
for BBD output balance (it's just a pair of 4k7 resistors) but I made sure the layout
can allow for those options and the PCB layout will give the builder the option of adding them if they wish.
5) There are 10R resistors between the main (audio) ground and the grounds of the LFO and digital sections.
6) I haven't put any 100nF caps directly been IC power pins on the bottom of the board yet.

Result
It flanges with no heterodyning whatsoever :)

Problems
LFO ticking: I didn't have that before. It could be because I have really long wires in there at the moment.
The wires to the rate pot are close to the audio section too, and not on the edge of the board like before.

Reliably hitting zero without crossing it: With the previous build, I could make the sweep hit the zero point without crossing it for all Depth settings.
I now find that having a single zero point at maximum depth causes the zero to be crossed at lower values of Depth.
I am currently thinking it is either:
a)  Something to do with those 10R resistors in the ground lines separating LFO ground from VCO ground.
The control voltages don't have a common reference point anymore.
b) When I took apart the old build and reassembled it, I may not have used the same components in the same places as before.
i.e. I previously fluked a situation that was trimable to a single zero point.

Investigation continues...
 
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on July 07, 2014, 11:39:24 PM
Great work Alex!

There is a fix for the ticking that is somewhat of a standard.

As Mark Hammer has pointed out, Boss implements this in their flanger designs.
There is also a mention in an issue of Stompboxology that Mark has been kind enough to post a link to.

Here is the relevant part about the fix:

(https://dl.dropboxusercontent.com/u/53299166/DIYstompboxes/ticking%20fix.jpg)

So what the added resistor and cap in the square wave generator does is smooth the square wave ever so slightly so that it's not such a drastic change in power consumption.

Assuming that you're using the same LFO as in the Build docs ver.1, here is your LFO with the components in place:

(https://dl.dropboxusercontent.com/u/53299166/DIYstompboxes/NZF%20schematic.jpg)

I just used this fix on a build I was working on over the weekend. I added pads on the board layout as a precautionary measure.
When I fired up the build...I had ticking. I added the components and even at a higher volume the ticking was completely gone.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 08, 2014, 03:32:58 AM
Thanks Larry.  I know about that anti-ticking measure from my Tri-Vibe build, and when I was doing my layout I even tried to allow those extra components as an option in the LFO.
The problem was that the way I had routed things, I couldn't fit in the 2 extra parts without reworking the whole LFO section, and that would cause me to rework a lot of everything else since the layout is already compact and I'm restricted to a grid.
So to cut a long story short I ended up ditching the idea.
I'll come back to it once I've got that zero-point issue worked out, but am hoping other measures like keeping the wires short will work.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 08, 2014, 03:34:05 AM
BTW Larry, did you find the ticking amplitude was worse at higher rates?  It could be subjective but I think that is the case for me.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on July 08, 2014, 11:20:33 AM
I didn't take any measurements but, the ticking did seem louder. I think it may have been because it was happening at a more constant rate instead of intermittently with a slower speed setting. As you said, it could be subjective.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on July 08, 2014, 01:41:38 PM
I didn't take any measurements but, the ticking did seem louder. I think it may have been because it was happening at a more constant rate instead of intermittently with a slower speed setting. As you said, it could be subjective.

Worst offender for ticking was the ETI flanger - I actually built that on PCB!! Ticking was definitely louder at higher LFO frequencies.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 08, 2014, 09:16:02 PM
Sorry for the long post.  Hopefully some of the info below will be interesting...

Thanks for the info on the LFO ticking, but I'm actually not too concerned about it at the moment because I know it is solveable by either the extra parts or by layout changes.   I've found that there is a greenie cap near the first audio-opamp input, and that cap is very close to where one of the rate pot wires goes into the board.   I can decrease/increase the ticking just by bending that cap away/towards the wire.

What I'm more bothered about is getting a single zero point for all depth settings.
On the previous build (after I got rid of the daisy chain power supply) I could put the depth to maximum and set the "offset" trim pot to give a single zero point (i.e. zero point touched without crossing).  As I decreased the depth pot towards minimum, I continued to have a single zero point, and when depth was at minimum I was "at the zero point" with good signal cancellation all of the time.  That's exactly the behavior I wanted, but I didn't have that with the new build.  I set things up to get a single zero point at maximum depth,  but when I put the depth close to minimum I found the zero point gets crossed.  Also the signal cancellation at the zero point didn't seem as good as before (possibly subjective because I didn't take measurements).
I suspected it was the 10 ohm resistors separating the ground sections, so I shorted those out and found that I had no heterodyning even with those resistors removed :)  I guess using star-topology for the supply lines plus physical separation of the digital sections was enough.
I will probably leave those ground resistors out to lower the part count.   
I'm not sure how much removing those resistors helped the zero crossing problem because I had to re-trim things, but the problem was still there.
 
So then I was thinking it must have been something to do with the parts I'd (re)used. I know that each VCO maps the CV to delay in a roughly linear way (there are graphs on the EM3207 thread http://www.diystompboxes.com/smfforum/index.php?topic=91981.msg799053#msg799053 (http://www.diystompboxes.com/smfforum/index.php?topic=91981.msg799053#msg799053)). 
I think tweaking the clock trimpot mainly changes the gradient of the line (much like changing the cap value), but you don't get any nice control control over the intercept on that line.  When we try and match the two VCOs with the clock trimpots, we are trying to put two lines on-top of each other just by changing their gradients.  It should be clear that this is not-possible in general, e.g. you may find that when you the match the gradients, you end up with closely spaced parallel lines rather than lines that lie on top of each other.

The gradient of the line is mainly governed by the cap value and the current set by the trimpot, but there is a non-zero intercept (zero CV doesn't give zero delay, and the VCO can only go so fast).  So the intercept is governed by other factors and I'm guessing partly by the comparator chip itself.
So based on that line of reasoning (which is still not properly thought out in my head)  I swapped the comparator chips in the VCOs with each other to see if that made a difference.  It did  :icon_exclaim:
Result: The zero point crossing problem was not noticeable i.e. like my previous build.  Signal cancellation when "at zero" seemed better too (but maybe subjective because no measurements). 

So how badly do things mess up if your unlucky with the comparators you put in the build?
Well maybe I'm begin fussy again.  When I get some time later this week I'll see if I can record some examples to show the effect I'm describing.

What I'm now wondering is if there is a way to tweak the intercept?  I remember reading about some experiments with that VCO on the EM3207 thread where they were looking at how fast they could make it go.  I think one of the things mentioned was lowering the pull-up resistor on the comparator output from 10k to 1k in order to better drive the CD4013.   I'm wondering if that corresponds to changing the intercept of the line?
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on July 09, 2014, 06:53:01 AM
chronologically ordered:
reply#10 (http://www.diystompboxes.com/smfforum/index.php?topic=635.msg5929#msg5929)
reply#11 (http://www.diystompboxes.com/smfforum/index.php?topic=18058.msg108913#msg108913)
reply#7 (http://www.diystompboxes.com/smfforum/index.php?topic=20401.msg126006#msg126006)
reply#8 (http://www.diystompboxes.com/smfforum/index.php?topic=22122.msg138756#msg138756)
reply#14 (http://www.diystompboxes.com/smfforum/index.php?topic=26071.msg173232#msg173232)
reply#2 (http://www.diystompboxes.com/smfforum/index.php?topic=40078.msg286963#msg286963)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 09, 2014, 10:55:59 AM
Thanks for those references Ton.  They confirm what I thought, and I will try shielding the rate pot wires.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 09, 2014, 12:46:14 PM
More thoughts on matching those two VCO characteristics...

I was looking at the graphs I mentioned above in the EM3207 thread and think I may have asked too much from my LFO control voltages.  Let me explain how I designed the CV section.

I took the triangle-to-sine conversion idea from the Tri-Vibe circuit with some minor changes:

1) Firstly the LM324 doesn't swing all the way to 0V.  It swing to about 0.6V from the bottom (EDIT: and about 1.5V from the top), so to get a symmetrical triangle wave the bias must be lower than half the supply.  That's also important to minimise ticking effects.  This explains the 100k:120k bias ratio for the LFO.

2) I chose the peak triangle wave voltages (determined by the 10k/27k resistor ratio in the LFO) and the resistor values in the "triangle-to-sine" section to give the best match to a sine wave.  That was done using simulation in LTSpice.  I ended up with the same resistor values in my "triangle-to-sine" section as is used in the TriVibe, but that was by design and simulation rather than straightforward copying.  If you simulate the TriVibe circuit, you get a rather "pointy" sine wave because the TriVibe has a different amplitude triangle wave in its LFO.

3) I then rebias and scale down the sine wave towards zero so that the minimum CV is about 0.9V.  More on why I chose that value below.
    This "target" minimum value of 0.9 V (think of this as "CV reference level") is actually set by the section with the two 3k9 resistors and the 33k resistor.  The stack of scaling resistors 82k, 27k+5k trimpot gives you the ability to tweak how the sine wave is scaled down so that its minimum matches that CV reference level.

4) The CVs then go through 10k + 100n LPFs to get rid of RF rubbish (with each 100n actually in the VCO section near the comparator inputs).
    The cutoffs of the LPFs is deliberately quite high (over 100Hz) because we don't want the filters to weaken the sine wave amplitude when the LFO is at fast rate.  Remember the whole point of the circuit is to have the same minimum CV values for all rates and depths.

So why did I choose 0.9V as a minimum CV?  Well I wanted the VCO to run as fast as possible, and having built a flanger with that VCO before, I new I could go down to about 0.8V before the VCO stopped working.  So that brings me back to those graphs I mentioned on the EM3207 thread.
It seems that when you are dealing with low control voltages and fast clock rates, the characteristic deviates from a straight line and is dominated by other factors than the trim-pot and clock cap (i.e. the straight line loses its slope and goes almost horizontal at low CVs).  So maybe it was not sensible for me to try and let the CV voltages swing into that section of the characteristic since it takes things into an area where you have less control.  I should have probably designed things to work with different CV range (say starting at 1.2V rather than 0.9V). I avoided doing that because it would come at the expense of lowering the maximum relative delay between the two delay lines.  I might be worth reworking the CV sections to work at a 1.2V reference level if that makes the process of matching the VCOs more reliable.  Another possibility (based on those graphs) may be to use larger clock caps.  I will probably give that a try first, and if it works then I will consider recalculating resistor values in the CV section.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 10, 2014, 02:36:47 PM
 :icon_biggrin:  :icon_biggrin:  I managed to fix the sweep problem (i.e. reliably reach zero-point without crossing it) with no circuit changes whatsoever

After writing down a bunch of equations to try and formalise things, I came to the conclusion that the problem may not actually be down to the components but that there was something else incorrect.  Namely the trim procedure.  The original procedure for matching the two VCOs needed revision.  Only two extra steps are needed to make the sweep work as intended.  I found that once the circuit was trimmed with the new procedure, it didn't matter if I swapped the comparator chips, or even if I put those 10R resistors back between the ground sections.  It still worked fine with no need to retrim  :icon_biggrin:

I explain the original procedure to match the two VCOs, and the extra steps needed to fix it using some graphs in the following document.
Hopefully that will give anyone who builds this circuit a mental picture of what is actually going on when adjusting those trimpots.
http://1drv.ms/VPNPIf (http://1drv.ms/VPNPIf)

Now to tackle that LFO ticking...
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 11, 2014, 09:09:26 PM
Update on the LFO ticking....
The ticking is definitely not coming through the power lines.
It's being caused by the the rate pot wires being too close to the audio section.
I wrapped the rate pot wires in aluminum foil and when I grounded the foil, the ticking got a lot quieter but it was not completely gone.
I can see why, and that is because there is coupling between strips on the bottom of the board too.

I have therefore redone the layout of the LFO section.  I basically rotated the whole section by 180 degrees so the rate pot wires are on the edge of the board instead of next to the audio section.  I also managed to include the anti-ticking measure mentioned by Larry, and I've managed to do it without increasing the board foot print  :)

Unfortunately it will be a real mess to try and take apart the vero build and recut all the tracks in the LFO section and short out unwanted breaks.
I think I'll start trying to do that, and if I screw it up then I'll have to redo the board from scratch.

Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on July 11, 2014, 09:35:40 PM
I have therefore redone the layout of the LFO section.  I basically rotated the whole section by 180 degrees so the rate pot wires are on the edge of the board instead of next to the audio section.  I also managed to include the anti-ticking measure mentioned by Larry, and I've managed to do it without increasing the board foot print  :)

Great Alex,

You're moving right along.

I'm eager to hear the end result!

The first bunch of boards that included LFOs and/or clocks that I routed worked well out of dumb luck.

It wasn't long before I managed to back myself into a corner having to hack on prototype boards to solve ticking/noise related issues.

Now I take great care in keeping clock and LFO traces as far away from the audio path as possible. There are times when you think that you provided enough distance only to find that a LFO trace is screaming when you fire it up.

I used to use solid ground planes as well. Now I use multiple ground planes for different sections that all come back to the main power filter caps.

I don't have to hack up prototype boards quite as much now.

 
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 12, 2014, 12:20:50 PM
I think I know why the ticking is louder at higher LFO rate (it's definitely not subjective on this build).
There are two wires that go to the 1Meg Rate pot.
For slow LFO rates, the pot resistance is 1Meg and only one of the wires has a big square wave voltage on it.
For fast LFO rates, the pot resistance is zero so both wires have a big square wave voltage, and so the amount of
interference on the audio part of the circuit increases accordingly.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: anotherjim on July 13, 2014, 03:35:45 PM
Hi,
I've been an avid lurker on this thread since I happened to be half way through a BBD project of my own when this started.
It's complete now but not perfect - there is a lot of noise/heterodyne at some settings via the power wiring, but the way I've done it, it would be back to square one to fix!
So I'm afraid I don't have design that's good enough to publish as it is. I really was just looking for a use for an old SAD1024 I've had for over 30 years. I still have the original Archer application sheet that came with it too. But I wanted to do more than a simple delay project.

I do think it's general layout has merit...

2 individual delays. Separate clocks but delay 2 can be switched to delay 1's clock.
Series or parallel routing.
2 triangle LFO's. Delay 1 has depth control for LFO1 and inverse LFO 2. Delay 2 has LFO2 depth only.
LFO2 has rotary type speed fast/slow inertia control with footswitch.
Regen from Delay 1 or 2.
Output mix of Dry, Delay 1 and Delay 2
Mix output jack and Delay 1 only output jack (disconnects Delay1 from mix out when used)
AC mains power! No wall wart! I got a cheap SMPS and put it in the case and fitted a standard "kettle" lead socket. This doesn't even get warm and is not responsible for the noise issues.

I wasn't setting out to make a thru-zero flanger, but it can be set up that way. I was more interested in an ensemble chorus effect. Hence 2 LFO's.

I think my main source of trouble was in putting all the oscillators in 1 chip! I used each gate in a single 4093 quad schmidt for each VCO and LFO. The VCO controlled by varying the timing cap (a fixed cap and another modulated in and out via a BJT). The LFO Triangle obtained from buffering the LFO timing cap.

I did put multiturn trim pots on the BBD outputs. It's certainly a help trimming out glitches but I never compared it to simply using fixed 1% resistors.

The noise is very much improved by switching to use only Delay1 clock. Obviously, there's no heterodyne noise (since this stops the Delay2 VCO). In this case I also phase shift the clock to Delay2 by 90deg. The Reticon data recommends spreading the clocks of multiple devices by a formula (2Pi/n Radians, where n is number of devices). This was easy to do by inverting the clock feeding Delay2's f/f (4013). Each BBD is clocked from it's own half of a 4013 and no extra buffering. Obviously that's not relevant if there's always independent clocking.
The Reticon data also suggests clock voltage can be lower than the BBD supply - maybe this is a way to reduces the strength of clock glitches.

My LP filtering is quite harsh @7Khz. Each delay has a 2 pole active going in, 1 pole passive and 2 pole active going out. The input/regen mixer also has 1pole active on it. All op amps are NE5532. and all the audio (Except BBD) is on a separate perf board with pots attached. The VCO/LFO and BBD are all on another board, again with pots attached so I didn't have any wires carrying fast stuff. Audio connections to the BBD are screened cable (Screen terminated only on audio board) and the BBD bias is via the pre-filter opamps. I did use a star supply scheme in general but there's still quite a bit on the digital board where the IC supply is daisy chained. I was a good boy and fitted 100n ceramics close to each chip as well as scattering 47 to 100uF electros in spare spaces.

There is no LFO ticking though!

The annoying thing is that the old string synths like the Solina had an ensemble chorus of 3 BBD's with separate clocks. I never heard any Het noise on those.

Anyway, good luck with your projects DrAlx. I'm sure your hard work will pay off.

Jim
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 13, 2014, 05:11:39 PM
That sounds like a really flexible circuit Jim. As far as getting rid of heterodyne noise goes, I think Puretube's advice (he posted a link to another of posts) is invaluable.   It sounds like you've read that and know the cause of you problem.  I suspect having two VCOs on the same chip is a problem, but have never tried that myself.  Clocking two halves of the SAD1024 with different rate clocks appears to be similar to having two separate BBD chips sharing the same supply.  That's what I had on my previous build (where the BBDs were using the audio supply) so I reckon that is OK.

Sometimes redoing a layout is the only way.
I decided it would be too much work to try and fix my last board with the new LFO layout, so I have decided to rebuild everything from scratch.
I've just spent 90 minutes cutting breaks in the vero tracks.  This will be the third time I've built the circuit (and desoldered the previous one which takes almost as long).  I'm hoping this will be the final build.


Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: anotherjim on July 14, 2014, 11:33:38 AM
I think it's telling me something that if I turn both delay taps off on the output mixer, the Dry only signal is as clean as I'd want. I could split the clocks onto 2 chips on a little daughter board, and it might even be possible to do the same with 2 BBD's in place of the single one.

I started off building this on a proto board but it soon became evident that all the coupling between the socket strips was causing havoc - I don't think this kind of device can reasonably be worked out that way - you have to go straight to copper and solder.

What I've built is usable I think. I haven't done any recordings yet, but the noise would probably get lost in a mix. It's capable of a very liquid chorus, so it's a shame that it probably couldn't be allowed on a solo part. The noise has some use -  If I turn up the regen into feedback, the 2 clocks and 2 LFO's can set up a mighty weird load of noise all by itself :)

All the Best

JIM
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on July 14, 2014, 01:01:30 PM

What I've built is usable I think. I haven't done any recordings yet, but the noise would probably get lost in a mix.

All the Best

JIM


I think that is sometimes forgotten - as I've said before, if you are doing a demo for your girlfriend who wants to know what you get up to for all those hours when you are not at her beck and call, well yes you want to be able to brag that you've cracked the noise problems and prove it! But in a mix or worse (better) in a live band situation, you simply will not hear it.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 20, 2014, 10:31:15 AM
Just finished the rebuild.  No LFO ticking now :)

The de-ticking mod mentioned by Larry needed adjustment though.  
The suggested values (33 nF + 68k) smoothed off the square wave too much and caused the sine wave amplitude to vary with sweep rate (which is bad for this circuit).
So I changed the values to 22nF + 10k and that stopped that problem,

I also made some simplifications.

1)  I removed the 100nF smoothing caps that I put on the bases of the current-source transistors in the VCOs.
     They were no longer necessary with the new layout.
     I kept the discharging VCO diodes under the comparator ICs though.

2) The LFO and audio share the same ground (so I could get a nicer layout).
     The LFO and audio sections are still star-grounded with respect to each other.  

3) I tried removing the 4.7uF Vgg smoothing caps.  The circuit works without them, but when I probed the Vgg
pin I saw large clock noise there.  So I ended up deciding to use 100nF ceramics instead of the 4.7uF electros.

4) I added more 100nF smoothing caps to the layout.  I haven't put any directly between IC supply pins on the bottom of the board.

5) The feedback trimmer was increased from 100k to 200k (so the optimal setting is close to the middle of the trimmer range).


I just need to write all this up now. New build instructions soon.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on July 20, 2014, 12:35:08 PM
Great work Alex!

Did you say sound sample soon?  :icon_wink:
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: anotherjim on July 20, 2014, 03:41:00 PM
Great news Alex.
When you've put this thing to bed, you can start writing a BBD design manual  :icon_eek: :icon_eek:
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 25, 2014, 06:08:02 AM
New build instructions are here: http://1drv.ms/1nZwx1i (http://1drv.ms/1nZwx1i)

There are actually two PCB designs in the doc.  A simpler one (the one I built) and another with all the extra trimmers for BBD bias and output balance.
The layouts are based on a grid structure, so you could use them to make a vero or pad board build (which is what I did, but it is rather too much work).

Now waiting for someone else to build this  ;)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on July 25, 2014, 05:45:46 PM
Nice work Alex!

You seem to be the master of conservative component design!  :icon_wink:

What is the chance of you posting the "heavy" PCB PDF file as actual size? It looks like it's ready to go but...I have no clue how to, or if it's possible, to resize a PDF and keep the high resolution.

Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 25, 2014, 06:33:39 PM
What is the chance of you posting the "heavy" PCB PDF file as actual size?
I'm not sure how to do that either.  Doesn't the size of the printed image depend on the size of paper that you use for printing? i.e. Isn't "A4" different to "Letter"?

If you click on the pictures below you'll get the raw images for the heavy PCB.
You can download them and paste them into something like Word, and resize them there.
The images should be scaled so they are 3.9 inches tall and 3.3 inches wide.  Does that help?

EDIT:  The resolution on these pics is too low. See posts below..
(http://i1368.photobucket.com/albums/ag185/DrAlx/COMPLEX_BOT_zps85bbcb8c.png) (http://i1368.photobucket.com/albums/ag185/DrAlx/COMPLEX_BOT_zps85bbcb8c.png)        (http://i1368.photobucket.com/albums/ag185/DrAlx/COMPLEX_MIRROR_zpsa851c7f4.png) (http://i1368.photobucket.com/albums/ag185/DrAlx/COMPLEX_MIRROR_zpsa851c7f4.png)


Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on July 25, 2014, 06:37:16 PM
What program did you use to create the original board files?

The images in your project PDF print out at almost full page even if I choose "page scaling" "none" on my onscreen printer menu.

The files are very large.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 25, 2014, 06:56:09 PM
What program did you use to create the original board files?
Forget those last pictures. They got messed up when I uploaded and lost some resolution.  Use these links instead and choose "View Original" option and download them.  They are higher resolution.

http://1drv.ms/1nq0sV3
http://1drv.ms/1nq0Anu

I wrote my own software for making all these layouts (working on a grid system of colored squares) because I couldn't find anything out there that would let me build veros the way I like.
Unfortunately it's still a work in progress, and although I can output the pictures to PDF (i.e. in vector format) I can't get the size at all correct.
So all those pictures in the build doc are actually just screen captures.  Same goes for the links I've just posted to the PCBs but I got higher resolution by  gluing together lots of zoomed-in pictures using a graphics package.

I haven't tried printing them yet !!!

I'd suggest copying a very small section of one of the images (to save toner) and do a test print to see if the gap between tracks and holes look OK.
I don't have a printer at home, or I would do the test myself.




Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on July 25, 2014, 07:00:20 PM
Will do.

Thank you.

If I get these resized correctly, I'll repost them on this thread.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 25, 2014, 08:18:19 PM
I loaded those images into a graphics package (Gimp) and it has the option of setting the print size of the image and printing to pdf file.  I did that and set the paper size to A4.  So if you have "Letter" size paper, remember to switch off page-scaling when you print.

Choose option to download as pdf.

Here are the "Heavy PCB" pdfs
http://1drv.ms/1l1Xa60
http://1drv.ms/1l1XNfG



Here are the "Light PCB" pdfs
http://1drv.ms/1nqk9MB
http://1drv.ms/1l1Xem7







Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on July 25, 2014, 08:48:06 PM
There we go!

I measured it with an digital caliper and checked IC pin spacing with a DIL14 IC. We're all good.  ;D
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on July 25, 2014, 09:33:45 PM
I was just reading through the BOM and saw that you suggested a 1590D or better yet a BBDD enclosure.

A 1790NS will work as well allowing plenty of room for jacks, switches and the like.

https://www.google.com/search?sourceid=navclient&ie=UTF-8&rlz=1T4GGHP_enUS450US450&q=1790NS


Edit:
The 1590XX is another option.

https://www.google.com/search?sourceid=navclient&ie=UTF-8&rlz=1T4GGHP_enUS450US450&q=1590XX#q=1590XX&start=10
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 25, 2014, 10:11:20 PM
My BBDD arrived in the post, and there is a sticker on it saying 1790NS  :)
So they are the same box, but marketed differently for some reason.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: Fender3D on July 26, 2014, 08:56:34 AM
What's better for a BBD pedal than a BBDD enclosure?



 :icon_mrgreen:
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: bluebunny on July 26, 2014, 09:59:26 AM
What's better for a BBD pedal than a BBDD enclosure?

A bucket?   :D
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on July 26, 2014, 10:02:10 AM
What's better for a BBD pedal than a BBDD enclosure?

A bucket?   :D

Carried by a brigade?   ::)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 27, 2014, 12:44:32 PM
Larry kindly tested a print out of the PCB pdfs and measured the track separation and found it too small if using the toner transfer method.
I didn't account for the thickness of the graphics pen that drew the PCB pictures  :-[
I have now modified the PDFs and re-done the upload.
They should have a track separation of about 0.025 inches now.
The links are the same as before.

Here are the "Heavy PCB" pdfs
http://1drv.ms/1l1Xa60
http://1drv.ms/1l1XNfG



Here are the "Light PCB" pdfs
http://1drv.ms/1nqk9MB
http://1drv.ms/1l1Xem7


[/quote]
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: armdnrdy on July 27, 2014, 01:44:04 PM
That was quick!

I printed the board file and checked it.....looks great!

I ordered parts yesterday so...time permitting, I'll get on this as soon as they arrive.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: DrAlx on July 30, 2014, 12:10:20 PM
Here is a link to Larry's component overlay for the "heavy" build.

https://dl.dropboxusercontent.com/u/53299166/DIYstompboxes/NZF%20overlay.pdf (https://dl.dropboxusercontent.com/u/53299166/DIYstompboxes/NZF%20overlay.pdf)

I'll update the build instructions at some point with equivalent pictures for the other builds.
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: puretube on August 20, 2014, 06:31:41 PM
That one glitch you don`t cancel at the output of the first of a few cascaded BBDs,
will ride on top of the audio into the next one and appear delayed at the output of that one. Now cancel that...
(or will it be that synchronized that it really does disappear by balancing that last BBD only?)

And how about the accumulating variable DC-pedestal?

More details to be found in BBD-related patents...


BTW.: tube-filament supply can be grounded on either side,
or centered fix,
or may be balanced with an anti-hummer pot - it all worx...   :icon_wink:

Fig.1 (http://worldwide.espacenet.com/publicationDetails/biblio?DB=EPODOC&II=0&ND=3&adjacent=true&locale=en_EP&FT=D&date=19750916&CC=US&NR=3906384A&KC=A) unveils the long hidden secret of the Memo-Man... (http://www.diystompboxes.com/smfforum/index.php?topic=73155.msg595211#msg595211)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: danfrank on November 19, 2020, 07:19:03 PM
Zombie thread, resurrected!!! Again!!

Hi everyone,
I came across this thread a few months ago and this project looked really interesting to me so I decided to build one. Many thanks to Dr Alx for bringing this to everyone here!
I just finished calibrating it today and this is a really nice Flanger. Calibrating this is fairly straight forward but it helps that I've been working with and calibrating a lot of flanger projects lately, so I kind of know how these things work. Practice makes perfect, I guess! Lol!
This flanger works as two delay lines, the control voltage of one goes from about 1 volt to 6.5 volts and the other's goes from about 1 to 2 volts. I still need to measure the frequency sweeps of both delay lines, but it looks like one does a wide sweep while the other hovers around the upper end of the frequency sweep.
How does it sound??? Really good! Adjusting the offset, I can get the zero part of the flange to just hang there for a bit before it sweeps back down. Really cool!
There's 3 knobs, one is for the speed of the sweep, one for the width of the sweep and the last one for regeneration/feedback. All the feedback knob does is make the flanger sound metallic so I don't use it much, which is ok because I find that through zero flangers don't really need feedback to sound good.
I'm in the process of painting the box, so it will be a few days before it's boxed up. I managed to fit this in a 1590C enclosure.
Thanks again for making this one available!
(https://i.postimg.cc/SnpLzqh9/IMG-20201119-180944.jpg) (https://postimg.cc/SnpLzqh9)
Title: Re: NEW CIRCUIT DESIGN: NZF Flanger
Post by: StephenGiles on November 20, 2020, 03:46:56 AM
Very good, has anyone heard from Larry, I hope he's safe and well.