Something I've been thinking about for a while. I bought some MN3205's a while back, intending to do something with them, I never got around to it, butI think i've got an odd number, 5 or so. Anyway, I was wondering how it would sound if you had two BBD's swept in opposite directions, mixed with the clean sound?? I'm thinking like the dimension, but at higher clock rates.
The Matsushita BBDs and their clones have an input capacitance on the clock pins that covaries with number of stages. The MN3205's input capacitance is 2800pf. To achieve the sorts of delay times needed to generate flanging from a chip with that many stages, you would need to clock it very high indeed. Not that it cannot be done at all, but you will definitely need to have a buffer to goose the current of the clock pulse feeding the BBD or else the sound will be awful.
Why would it sound awful? The input capacitance acts like a lowpass filter on the incoming signal. If the clock signal is low enough (below say 100khz) then the input capacitance will not be enough to turn that crisp quare wave clock pulse into anything else. As the clock frequency starts to go higher, though, the rising and falling edges starts to get rounded off and less and less of the clock ends up being at the critical voltage needed to switch the FETs inside. In short, it starts to behave like a clock pulse with less than a 50% duty cycle and the continuous "handoff" of signal sampling between the two outputs of the chip starts to become more like sample-rest-sample-rest-sample-rest; i.e., an intermittently sampled input signal. :P :P >:( :icon_eek:
It was done in the WEM Hyperflanger 20 years ago.
Which part, the countersweeping or the use of "over-capacity" BBDs?
The countersweeping - it used MN 3004 x 2.
http://www.4shared.com/file/19526343/f88d70d0/hyper3.html
http://www.4shared.com/file/19526350/789f102b/hyper_input.html
http://www.4shared.com/file/19526343/f88d70d0/hyper2.html
Dammit!
I guess i'll have to see about using them in a Dimension clone then.
I am afraid the BBD part of the WEM schematic is missing.
So it is! I remember now, my dog came and put his head on my knee, which means "please come and play with me"! I'll put it up this evening. :icon_biggrin:
Quote from: StephenGiles on July 09, 2007, 05:20:19 PM
http://www.4shared.com/file/19526343/f88d70d0/hyper3.html
http://www.4shared.com/file/19526350/789f102b/hyper_input.html
http://www.4shared.com/file/19526343/f88d70d0/hyper2.html
here's the BBD section
http://www.4shared.com/file/19598557/7579bf18/hypflange2.html
Ok, i'm a little confused I must admit.
I just went and checked, and I do in fact have three MN3007 BBD's.
I remember now why bought them, I was thinking of using parallel, anti-phase swept stages based on the ultra-flanger, because the shortest delay time available from the 3007 is ~5ms, when clocked at 100kHz according to the datasheet. So, if I was to clock it at a very high frequency, i'd be able to open up the low pass filtering a little, yet stil maintain a wide sweep. Is this the case, or am I talking out my arse?
However, I see from John's UF schem, that he's clocking the chip at between 50kHz and 1MHz, which is ten times the rate specified in the datasheet, so am I missing something?
If you look at the Ultra Flanger schematic, you will see two trios of paralleled invertor sections between the 4046 clock generator and the clock input pins on the MN3007. Thse provide a suitable buffering and current-increasing effect to the clock pulses so that they remain nice and square, even at those high frequencies. In the absence of this buffering, the input capacitance of the BBD would end up rounding off the clock pulse, as I described in my earlier note.
The specs you see in the datasheets for any of the Matsushita/Panasonic chips are predicated on the assumption that you are driving the BBD directly from an MN3101 or 3102 clock generator chip. Since they are in no position to make any assumptions about what sort of buffering you might use, they provide conservative specs.
If you ARE talking out of your arse, you have one smart arse, because one of the advantages that flangers have, especially when clocked so high, is that any clock whine that might bleed through is so far above human hearing that you can afford to skimp on the normal sorts of lowpass filtering. You will note that the Ultra Flanger has exactly 2 poles of lowpass filtering between input and output, in contrast to a 3-pole lowpass before and after the BBD in the CE-2.
Quote from: Mark Hammer on July 11, 2007, 09:07:47 AM
If you ARE talking out of your arse, you have one smart arse, because one of the advantages that flangers have, especially when clocked so high, is that any clock whine that might bleed through is so far above human hearing that you can afford to skimp on the normal sorts of lowpass filtering. You will note that the Ultra Flanger has exactly 2 poles of lowpass filtering between input and output, in contrast to a 3-pole lowpass before and after the BBD in the CE-2.
Now i've been called a smart arse many many times, but I'm pretty sure that's the first time anyone's ever said my ass itself is actually smart. Not sure that should please me really..
I had indeed noted the lack of filtering on the UF output, which I had correctly assumed was due to the very high clock rate. The three parallel inverters had intrigued me, it hadn't occured to me that that would be a method of increasing current.
Can I ask what suggestions you would make with regards to building a flanger as i'd described earlier? From what I can tell, the UF has problems with its LFO, so is it a wise starting point for a new design? (Gotta admit I know next to nothing regarding delay based effects design).
just mix the 2 delays against each other (leave out the "dry"), and you get TZF at relatively "normal" clockrates...
I thought about that, but then I thought it would produce pitch wobble if there was no clean signal mixed in.
s-l-o-w...
(http://atschool.eduweb.co.uk/ufa10/puzzled.gif)
Eh?
:D
QuoteCan I ask what suggestions you would make with regards to building a flanger as i'd described earlier? From what I can tell, the UF has problems with its LFO, so is it a wise starting point for a new design? (Gotta admit I know next to nothing regarding delay based effects design).
I got a few MN3007s recently, and I've been thinking about doing something similar, starting from the Ultra Flanger as my basis for experimentation. I was thinking that the first thing I would try is to remove the LFO altogether, and replace it with a CV input. My thinking was that this would make for a relatively simple little board to experiment with -- first see if I can get one of them to behave a little better with a separate LFO than the stock UF WRT noise. If that works out, make another, and try playing various tricks with fixed and counterswept delays and a splitter/blender arrangement.
That's my plan, but it's still on the drawing board until I find some time to work on it.
Quote from: Jaicen_solo on July 11, 2007, 06:16:43 PM
(http://atschool.eduweb.co.uk/ufa10/puzzled.gif)
Eh?
slow variations won`t "wobble" - they just "sweep" (or: "flange")...
What`s nice with TZF, is the fact that the sweep ratio vastly increases:
while BL3207 datasheet speaks of 2.5ms to 50ms (1:20 sweep-ratio),
if you use 2 swept BBDs let them sweep only from 5ms to 10ms and back(1:2 ratio),
the time-difference between them goes from 5ms through 0ms to -5ms(representing an 1:infinity:-1 ratio).
[actually, the limited resolution due to the clocking e.g. @ 200kHz is somewhere near 5µs,
so it`s rather a ratio of only 1000:1:-1000 for 5ms to 5µs/0µs/-5µs to -5ms...
but you get this from sweeping the individual clocks only by a 1:2 ratio...].
{another thing is however, the fact that one needs a certain "minimal" maximum delaytime to cancel/phase out low frequencies as well...}