Modified post and MPF102 circuit...
It appears getting the source resistor down to where...
it's not too low etc. Did the trick just find so far, I could finer-tune it if I felt like it, and might even attempt that math again now that I'm 1/2 knowing which way makes 'up-when'...
So, plenty of boost, very nice, BMP output is increased by the 10% estimates goal with volume adjustable well above that.
Basically the goals are being met, the learning curve could be a little quicker but at least slow-mo is better than no motion.
I got stuck looking at that 100k trimpot on the Fetzer drain, thinking for some reason I needed a 'large' >22k or so resistor there.
It's for a distorter, so no big deal, it's distorting and pushing the amp very well indeed. I think whether it sounds like a triode is immaterial here.
Same thing
Trying to decode and cypher the math at Fetzer article abbreviations.
Is square law the inverse of "inverse-square-law" [wiki has isl information:
http://en.wikipedia.org/wiki/Inverse-square_law
Consider this:
a. linear circuit = unity or 1.0 exponent
b. triode = 1.5 exponent
c. JFET = 2.0 exponent
d. JFET with "magic" Rs and no bypass cap = 1.5 exponent around the operating point
What is an 'exponent' ?
http://www.thefreedictionary.com/exponent
A number or symbol, placed above and to the right of the expression to which it applies, that indicates the number of times the expression is used as a factor. For example, the exponent 3 in 53 indicates 5 × 5 × 5; the exponent x in (a + b)x indicates (a + b) multiplied by itself x times.
Whew...
I know I might want a Jfet after my BMP, about to put a Mu amp there and see if I can get:
MPF102 in a stratoblaster [or whatever] type configuration...
Drain 2.6v
Source 2.5v
Gate .01v
To look more like:
Source above gate by some amount [I have that,^].
Drain about 1/2v...I'm getting this with 7k5 drain and source resistors, Gate has a 470k to gnd.
I'm not sure these bias points will provide any gain, I'd like a bit more output...
and some kind of Jfet tone here, more can be known after I actually put a Jfet in this position...any suggestions welcome !
Any math penetrating comments like say "smaller resistors = more current" or anything else related to 'a direction'.
Since I haven't been able to wrap a handle on a Jfet by the available means and this Stratoblaster insists on teaching me something, perhaps fiddling with an un-biased circuit such as this will give me an idea of what direction a resistor should go, what direction a voltage will move when said resistor changes.
Back to Fetzer cypherin'...
Perhaps anything with charts would put me on to the 'math directions' 'up or down' 'when'...type stuff.
I know there are threads, I'm searching them too.
Quote from: petemoore on June 17, 2010, 08:50:22 AM
What is the definition of vocabularies here ?:
Idss = Current in the drain with gate shorted to the source. This is the largest DC current the JFET will normally pass. If you short the gate and source terminals (duuuh...) and put a voltage across drain and source+gate, this is the current that flows.
Vcc = I think this is the supply voltage; not too sure where that equation came from.
Vp = pinchoff voltage for this JFET
In biasing a JFET, the thing which sets the drain current is the gate-to-source voltage. JFETs are depletion mode devices; if the gate-source voltage is zero, they flow maximum current. You have to do something to the gate-source voltage to turn them off. This "something" is reverse biasing the gate-channel diode. So for an N-channel device, you make the gate negative with respect to the source. At some point, the negative gate voltage will completely choke off the current and the JFET is off. This is Vgsoff.
Generally, Vgs is set by grounding the gate through a high value resistor (remember - the gate is a reverse biased diode, so even with big resistors, the voltage across the resistor is nominally zero) and connect the source to ground through a resistor. Current does flow through this resistor and raises the source above ground. The gate stays at ground, so the resistor causes the source to be higher than the gate, and introduces a reverse bias on the gate.
This reverse bias causes the current to be lower than Idss. This lowers the source voltage and lets more current flow. It's a negative feedback setup much like the bias on a triode or pentode, which are also depletion mode devices. The voltage and current settle where the current provides just enough voltage elevation to the source to make the gate source voltage be negative enough (for n-channel devices) to make that current flow.
The big issue here is that Idss is different from JFET to JFET of the same type. So is Vp. So is the transconductance, the ratio of how much a change in the gate-source voltage changes the drain current. These are all interrelated by the device physics, which is nice, but in a way that makes it very complex and variable from device to device as to where a given bias network will make the currents and voltages settle.
Quote from: petemoore on June 17, 2010, 09:12:19 AM
It's basically a Stratoblaster starting with a 7k5 source resistor.
I get the drain to 1/2v using a 7k5 or so drain resistor.
Will this setup provide gain ?
Probably not. If the drain is at 1/2 of the supply voltage (If I understand you correctly) with a 7.5K resistor, then the source will also be at 1/2 the supply voltage. Remember that the same current flows in the drain as the source; the gate is effectively an open circuit. So if the drain is at 1/2 the power supply, the source is too, and the device is saturated; no amplification can happen.
Even if the device is not saturated, if you have equal source and drain resistors, the gain must be one unless you bypass the source resistor. This part is just like with bipolars.
QuoteWill a drain which is very low voltage bias [.2volts or .4v above the source] provide gain and be fairly symmetrical ?
I'm not sure exactly how to parse that. The voltage between drain and source doesn't say much about gain. It just says that the total signal swing is limited.
It's not going to be symmetrical. You can turn it on only another .2-.4V. But you can turn it off the full rest of the power supply.
Rs = 0.83 * |Vp| / Idss
This seems like a good starting point.
Rs = 2k1
With
Rd = 3k6, Drain is 1/2v.
A little better.. or is it...than trying it with a large source resistor ?
The large source resistor made it necessary to have the large drain resistor.
Prehaps even smaller value'd help the source.
I've not seen values shown larger than 12k for a Jfet source [ie Stratoblaster...kinda where I started ending up with the big source = drain resistor values], so I guess I should keep going smaller here and see what that does.
Having no idea what goes where when and which R raises voltage in relatiiong to the tont ehwonthermeriershare ednsaduent ehermemt ai bvolband voltage gain viamuamp seems llogcial compared to this stuff.
thanks for the easy explanation, R.G.! :)
I'm happy that it is easy for you and RG to understand, I was hoping someone would come along and point out how easily this is understood.
I feel like I can contemplate how it actually works, Rs has to be a certain value which Rd can help decide.
I'm having trouble reading or working most of the math equations.
I'll try to hammer some comprehension of the numbers beyond ''get some gain by diddling with the Rs and Rd so the gate is biased above source sufficiently/and there's sufficient gain.
It seems the smaller the source resistor the easier it is to get a 1/2v which allows the Rd to be larger than the Rs...too small and the gate isn't biased above the source.
It's not that easy to understand, I'm still "getting there", but I know just a little bit more about JFETs. They're like sphincters, but for electrons :P
sorry for the misunderstanding, but I'll still give this a shot!
I'm trying to simulate this, but I'm clueless of how to see what's going on when I try SPICE and the other sim I'm using doesnt seem to like me...
Either that or RG's right about the gain being 1 (he probably is, but lets assume he isnt!), cause I plugged in the calculated Rs and Rd values for an MPF102 in a Fetzer deluxe and I'm getting a clean 766mV from a 1V 220Hz AC signal. I even doubled the voltage to source and its still at 766mV...
Looking at the formula in section 7:
Av = 0.5 (Rd/Rs)
Av = 0.54 (Vcc/|Vp| - 2)
Plugging in 9V for Vcc and 2.34 for |Vp| (based on the average values stated on the bottom),
Av = 0.54 (9/2.34 - 2)
Av = 0.54 (3.85 - 2) = 0.54 (1.85) = 0.999
Doubling the voltage should yield:
Av = 0.54 (18/2.34 - 2)
Av = 0.54 (7.7 - 2 ) = 0.54 (5.7) = 3.078
But it doesnt double in the sim... unless you play with Rd. How to do this mathematically, I don't have a clue.
I guess at this point, to go on, it's best to figure out the current so we know how to calculate our resistances by V=IR
Section 5 gives us:
Id = Idss (0.44 Vcc - 0.78 Vp) / (Vcc - 2 Vp)
with Idss for an MPF102 ~ 5.65mA,
Id = 5.65x10-3A ( 0.44 (9V) - 0.78 (-2.34V)) / (9V - 2 (-2.34V)
Id = 5.65 x 10-3A (5.79V / 13.68V) = 2.39 x 10-3 A = 2.39 mA
So lets say you'd like to figure out Rs, you can use V = IR to get the resistance:
Vs = Vp(0.37 Vcc - 0.65Vp) / (Vcc - 2Vp)
Vs = -2.34V (0.37 (9V) - 0.65 (-2.34V)) / (9V - 2( -2.34V))
Vs = -2.34V (0.35) = -0.819V
R = V/I
Rs = 0.819V/2.39 x 10-3A = 343Ohms
That gives a general ballpark figure for Rs
Now I personally think that Rd can only be a certain value that Rs allows. Anything too high and the gate won't be biased above the source. Not 100% sure, cause Im still new to electronics, surely the gurus can help. At this point, I'm guessing using the Rd formula in section 5 should have it bias properly with the given Rs, but i have NO IDEA WHATSOEVER how the coefficients in the formulas were found.
anyways, i'm mathed out for a day. good luck!
I'm sure that it is just me, but frankly, I can make great sense from Yoda's reverse English, but not so much from petemoore. Stream of consciousness musings, taken out of an esoteric frame of reference, is a cypher I find myself not willing to spend any time decoding. Perhaps I should down a few Pangalactic Gargleblasters first. ??? :-\ This Earth world is strange indeed....
Quote from: phector2004 on June 17, 2010, 02:35:26 PM
They're like sphincters, but for electrons :P
I am totally adding a Sphincter Control to an effect now.
I just looked it over again, and you can set the gain from the very first formula I mentioned(Av = 0.5(Rd/Rs)) by rearranging, throwing in your desired gain, and plugging in the calculated resistance
i.e. For a gain of 10,
2Av = Rd/Rs
Rd = 2AvRs
Rd = 2 (10) (343 Ohms)
Rd = 6.8k
I'll try it out tomorrow morning, hopefully someone more knowledgeable can help till then!
QuoteConsider this:
a. linear circuit = unity or 1.0 exponent
b. triode = 1.5 exponent
c. JFET = 2.0 exponent
d. JFET with "magic" Rs and no bypass cap = 1.5 exponent around the operating point
What is an 'exponent' ?
(http://a.imagehost.org/0061/exp.gif)
1) Triode following three-halves law ( ^1.5) , 2) JFET without source feedback following a parabolic exponent function ( ^2), and 3) JFET with moderate amounts of source feedback following three-halves law.
I too would like to thank RG and Phector for the explanations, detailed/simple or other !
I'm sure that it is just me,
Then why share it ?
but frankly, I can make great sense from Yoda's reverse English, but not so much from petemoore.
I'm sure your Yoda will be overjoyed to find this out !
Stream of consciousness musings, taken out of an esoteric frame of reference, is a cypher I find myself not willing to spend any time decoding.
You just spent time on it !
Perhaps I should down a few Pangalactic Gargleblasters first.
I'm not sure you should get fried just because you read a thread you liked.
This Earth world is strange indeed....
You should try stream of consciousness, Yoda's friend !
Quote from: petemoore on June 18, 2010, 07:48:05 AM
I'm sure that it is just me,
Then why share it ?
but frankly, I can make great sense from Yoda's reverse English, but not so much from petemoore.
I'm sure your Yoda will be overjoyed to find this out !
Stream of consciousness musings, taken out of an esoteric frame of reference, is a cypher I find myself not willing to spend any time decoding.
You just spent time on it !
Perhaps I should down a few Pangalactic Gargleblasters first.
I'm not sure you should get fried just because you read a thread you liked.
This Earth world is strange indeed....
You should try stream of consciousness, Yoda's friend !
===================
===================
I publicly apologise to petemoore for my posting,
and to the diystompbox community,
for publicly venting a personal frustration and failing,
in an obnoxious manner. Mea culpa.
===================
===================
Decided to play with this in the sim... it started acting funky... with a 343 ohm, and the calculated Rd (650 ohm i think) It was giving me the usual 700mV from my 1V 220Hz signal.
Making Rd 6.8k reverse-biased the JFET and caused the program to stop.
Making it 4k boosted the signal to 5V, but it had positive offset (I'm guessing... signal ranged from +3V to -2V). It also "kinked" the waveform so it was getting a steeper down-slope and a more gradual upwards slope.
Increasing Rs to 1k with Rd at 4k gave a 4.5V signal, without the offset or kinkiness
Making Rd 6.8k reintroduces the offset and kinkiness.........
This is starting to look like something that needs an EE degree :(
Or at least a cheat sheet!
I like 'em...regardless if it took me a 'minute' to figure out, in this particular Jfet circuits case, to small-ize the source resistor...it kept getting smaller faster than the drain...ie conscious stream talk instead of EE understanding of maths etc.
Doesn't seem to boost as much as a bipolar, and requires a great deal more fiddling with...still worth it.
I get the feeling even if I did fiddle with it to the point of max output before distortion [as a possible goal], I'd consider what I have right here as good sounding. I can do another stage, and use 12v or 18v as a supply, it was just for a minute [or 500] there that I couldn't visualize a small source resistor there.
You could also try it with a J201, 2SK30AY, or 2N5457
they all have gains above 1, but the J201 might be overkill at about 5. The other two have gains of about 2. The article even mentions how to figure out Vp, with which you can figure out the gain differences between same types of JFETs
Hint...When designing with JFETs for distortion, to know Rsource is to 'NO Rsource !'
Pete, you are in a bad crowd.
Common JFETs are hard to use under 9V supplies. That's why we always see trims, and why there is always a "Help!" thread on the board.
Think outside the (stomp)box. Learn how to do it Right. -Then- learn what compromises and fiddles must be done to work at 9V.
Basic Fact: it takes 1V-5V to turn-on a JFET. This bias is an input signal. You are talking voltage amplifiers. You want the input smaller than the output. For easy biasing you want the input variation to be much smaller than the output. The output is constrained by supply voltage. The output should be much greater than the 1V-4V range. If you know your JFET's on-voltage is low, 1V or so, you can try 10V or maybe 9V. If you just buy any handy JFET, you may need 40V or more for an "easy"-bias happy amplifier. But you should respect the 30V-40V breakdown of most JFETs. A 24V supply is a better experimental platform than a 9V battery.
This business of varying the Source load resistor is bogus, a not-100%-successful compromise with available JFETs and 9V supplies. The Basic Concept for an audio voltage amplifier is: a 3-way tug-of-war between the device (JFET), the DC load (Drain resistor), and the audio load (tone-stack, pot, next stage, etc).
In this tug-of-war, the amplifier should dominate the load. We select the Source resistor 1/2 to 1/5th the load. Say the load is a tone-stack. Using Fender Twin values, this may be roughly 220K. Therefore the Source resistor should be 110K to 44K. 47K is a standard value, use that.
In the tug-of-war between Source resistor and JFET, both contribute to output, we want a "fair fight". We set the Drain voltage about half-way up the supply voltage. For 24V supply, near 12V. You can go higher or lower, 1/3rd or 2/3rd, no big difference until overload happens, so start at 12V. This means 12V across 47K or about 0.25 milliAmps current.
At peak negative output the JFET should be able to pull nearly the full supply voltage across the 47K. 24V/47K is 0.5mA. we must be sure the JFET can pass 0.5mA. We select an Idss greater than 0.5mA. This is not usually a problem for common JFETs with these values.
If Idss is over 0.5mA, and we zero-bias the JFET, it will suck the 47K down to zero and get jammed up. We need to apply a bias voltage to get it to 0.25mA. We do this with a Source resistor. Most JFETs will bias-up with 1V to 5V. The current should be 0.25mA. So the Source resistor should be 1V/0.25mA= 4K to 4V/0.25mA= 16K. For an unknown JFET, tack about 8K in there. If 10K is handy, use that.
I just simulated such a stage, 24V 47K 10K, with the first simulated JFET I found in my sim library. It biased-up at 0.256mA. I tossed in another, it biased to 0.131mA. With no source bypass cap, the gains were 4.3 and 4.8, because the large source resistor is heavy NFB. With source bypass cap, the gains were 53 and 100, varying with the specific JFET used but not a gross difference.
The second JFET I tried, which gave 0.131mA, biased the Drain up at 18V, 3/4 of the supply voltage. The un-fair tug-of-war gives early clipping and marginally lower gain than we might find. Changing the Source bias resistor to the low end of the range, actually 5K, gets 0.252mA and a gain of 130.
The assumed 220K load is "easy". Say you wanna drive a 10K pot. You need more current. Select your Drain resistor for 5K to 2K. 3.3K is a standard value. To get 12V across it we need about 4mA at idle bias, 8mA maximum. We must find a JFET with Idss greater than 8mA (which may be more than most JFETs sold for small-audio are sure to pass). Assuming the bias voltage is probably 1V-5V, the Source resistor must be 1V/4mA= 250 ohms to 5V/4mA= 1.2K. 500 (or 470 or 560) ohms would be a good trial value for the Source resistor. This sims to a gain near 30.
And that leads to a basic truth for most resistor-loaded voltage amplifiers. You must have enough current to drive your load. But you don't want much more current or the gain falls off.
A trade-off to get gain back is to increase supply voltage. Going up gets unreasonable very quickly. However going down gets pretty sad as supply voltage gets near device bias voltage. And 1V-5V bias JFETs under 9V battery is a very tough design problem, usually requiring close JFET selection or hand-trims with some untrimmable JFETs.
cool!
I know I'm hijacking this thread with my questions/attempts, but are there any good ways to estimate the load? What if the load is the output?
Quote from: PRR on June 20, 2010, 12:20:40 AM
Pete, you are in a bad crowd.
Don't tell my girlfriend's parents!!! :P
Pete, you are in a bad crowd.
Yes, but I think if I work with them some more they'll let me in on some of the cool-o-mojo.
I can't thank you guys enough for the explainations, definitions and Jfet experience/understanding !
PRR has once again initiated an electronic epiphony !
With fresh inspiration, renewed interest, and the empowerment of improved understanding/comprehension, the ROG Fetzer test-rig for Idss/Vp gets put together and joins the Jfet crusade ! That, and some variance in the power supply should allow me to have "Jfet and the Jfets" work well with others.
Hi Pete and all....
there are two ways to get involved with the math.
1. enter the formulae above into a spreadsheet and use the solver to optimise one of the parameters. To do this you will need at least one point on the Vgs - Id relationship. I set this up some time ago, but I never use it.
or
2. use some rules of thumb. From memory, I calculate things roughly like this: (i) choose your device: the more negative the Vgs, the lower the maximum gain (J201 with -1 V can give more gain than MPF102s with Vgs of -5 V), (ii) chooose a drain current and resistor. If you go for plenty of current you can assume the JFET is turned on and its resistance is low (a couple of hundred ohms). A mA is often a good amount of current, so for Vd = 4.5 V, that's 4.7 kohms. (For Id less than 0.1 mA these rules won't work too well as the JFET resistance will be high), (iii) now that you know the Id choose Rs so that the JFET is well "on". e.g. for a J201 with a Vgs(on) of -1.5 V, I'd select a Vgs of -1 V (at 1 mA), and use a 1k resistor for Rsourse (a very familiar value !), then (iv) choose a bypass cap and resistor to get the gain you want (gain is approx Rd/Rbypass e.g. 6.8k/0.47k = 15). There is a limit to how much gain you can get, so it's no use using an Rbypass of 0.01 k. The cap (in uF) x the resistor (in K ohms) shouls be at least 10, so that bass doesn't roll off too much.
just my 2c...
> the more negative the Vgs, the lower the maximum gain (J201 with -1 V can give more gain than MPF102s with Vgs of -5 V)
True; but this follows from the concept of "input". If a smaller voltage will give a full range of bias, a smaller voltage will give a full range of Drain swing (i.e., gain).
Actually, you want V(t) +and+ Idss. If a part has a huge Idss, far more than you need, you will only use a small part of the V(t). However the interaction makes my brain explode.
> its resistance is low (a couple of hundred ohms).
Not sure what you mean by that. In any normal amplifier use, the FET is worked in the "pentode range", the dynamic "plate impedance is infinite (well, very-very high, higher than any likely load). The static plate impedance is, as you compute, around 4.5K for 4.5V 1mA; but there's no direct way to put that in the math. In fact what you do is set-up the gate-source voltage for about 1mA, and the FET will do that for any source-drain voltage from a few volts up to its ~~30V limit.
> For Id less than 0.1 mA ....
Just FYI: an UN-loaded FET's voltage gain goes up with decreasing current. For constant load-resistor DC drop, the resistor goes up directly as current goes down. However the Square-Law Gm goes down as square-root of current. So from 1mA to 0.1mA, load goes 4.5K to 45K, Gm may go from 3mS to 1mS, effective source resistance goes from 300 to 1K. The ratios 4.5K:300 and 45K:1K suggest the gains: 15 and 45.
Don't take this to absurdity. If the load is 45K, the 4.5K case is hardly loaded, the 45K case is heavily loaded. Actual gains will be more like 13 and 23. Still different, but also consider the reduced maximum output level. 4.5K driving 45K can swing 90%, 45K driving 45K can swing 50%.
Quote from: PRR on June 20, 2010, 12:20:40 AM
Basic Fact: it takes 1V-5V to turn-on a JFET.
???
Pete is indeed in a bad crowd ...
I'm suffering a lot with this thing... :icon_rolleyes:
I'm trying to understand without any succes.
Using the Echoplex Preamp for example, 22k dr, 3k3 sr:
If I have:
- 2N5457: 2,5 to 3,5 V at drain.
- BF245: 4,5v at drain.
- J201: 6v or more at drain.
The first two works great, but with J201 I have to reduce source res to 1k5 or 2k to work.
If I use less than 3k in source with 5457, it distort in bad way.
There's something that I'm not understanding...it's necesary to get the half of the voltage provided in Drain?
> I'm suffering a lot with this thing...
And bumping EVERY thread with a JFET reference.
Why?
> .it's necesary to get the half of the voltage provided in Drain?
No. Only that the drain not be slammed to the floor or ceiling (zero or B+).
Quote from: PRR on May 17, 2017, 11:29:21 PM
> I'm suffering a lot with this thing...
And bumping EVERY thread with a JFET reference.
Why?
> .it's necesary to get the half of the voltage provided in Drain?
No. Only that the drain not be slammed to the floor or ceiling (zero or B+).
First of all: thank you for your time and help. :)
Can I ask: is it wrong to bump a thread? Do I bother somebody that way? :icon_confused:
I really ask ... because I'd rather to bump a thread, before to open a new one to talk about the same thing that was talked in 20 threads.
That's why, and because I'm not bother anyone.
Don't get me wrong :)
>
is it wrong to bump a thread?No.... but you have been bumping a LOT of threads about JFETs all week.
Quote from: Plexi on May 17, 2017, 10:38:44 PM
Which values are the most important to compare JFets?
Quote from: Plexi on May 17, 2017, 01:47:52 PM
I'm suffering a lot with this thing... :icon_rolleyes:
Quote from: Plexi on May 17, 2017, 11:09:17 AM
I'm dealing now of understand a simple way to bias a Jfet... :icon_rolleyes:
Quote from: Plexi on May 16, 2017, 07:06:18 PM
...re-biasing a J201 in a Echoplex preamp was all to discover about Jfets...
Quote from: Plexi on May 16, 2017, 05:50:44 PM
Hi everyone...
Here's another update of Plexi's diary of a Jfet (¿)
Hi everyone ...
Here's another update of Plexi's diary of Jfet (?)
Quote from: Plexi on May 13, 2017, 09:07:37 PM
Hi everyone...
Here's another update of Plexi's diary of a Jfet (¿)
Is that bother you?
Why don't you start a "Plexi's JFET questions" thread? Necro-posting largely the same question to a whole bunch of ancient threads is not a great idea: many of the previous posters have gone; you can't keep track of the answers; we can't keep track of the answers.
Thanks for your patience, bluebunny :-)
You're right, thats was the idea when I opened the thread about the EP preamp (the same thread from were PRR has quoted 3 times the same message..Idk......).
I've made some coments (aka 'bump') in the "plexis diary of a Jfet" about my updates. But it seems that bother anyways.
It wasn't my intention.
> PRR has quoted 3 times the same message..Idk....
No, I quoted very carefully. You posted the same phrase twice in one message, once in another in the same thread.
Quote from: PRR on May 19, 2017, 08:59:49 PM
> PRR has quoted 3 times the same message..Idk....
No, I quoted very carefully. You posted the same phrase twice in one message, once in another in the same thread.
You're right, damn Tapatalk... ;D
Corrected!
I hope you haven't bothered by my typo, too. :icon_rolleyes:
Anything else, good sir?