New ready for transfer (untested) Hot Harmonics layout

Started by MartyB, March 15, 2004, 01:05:44 AM

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MartyB

Here's the untested ready-to-transfer mask.  I'm still working on a way to remove the pesky grid dots and get a transferable file out of ExpressPCB without having to scan an image.   See description at my link.


http://www.freewebs.com/martyb/File0010.JPG

http://www.freewebs.com/martyb


Thanks Peter and the others here for your help.
Marty

Mark Hammer

I haven't really checked it through exhaustively, but you do realize that all unused invertor sections need to be tied to V+ to reduce noise?  This aspect is often (sadly) omitted from posted schematics.  I think I've committed that crime myself.

javacody

There are instructions somewhere on how to turn the dots off to make your image. Not sure where.

Aharon

Aharon

Peter Snowberg

ExpressPCB makes it as hard as possible to use their software without using their fab service, so no easy answer there. Sorry. I know it has been discussed a bit around here in the past... check the archives and you might find more.

You can get rid of the jumper on pins 11/14 by running a trace under the chip to pins 7/8. You can also get rid of the other two jumpers by using an axial cap instead of a radial and just increasing the space between the holes so you can pass under. ;) If you want to stick with a radial, I would suggest doubling the two pads at the upper right so that the jumpers enter one hole and your off-board wires go into separate holes next to them.

Looks good! :mrgreen:

Take care,
-Peter
Eschew paradigm obfuscation

MartyB

Thanks guys!  Peter I agree with your suggestions.  Also the transfer needs to be mirror image so I'll correct this.  Mark H. , or anybody else, can you give me just a bit more detail about wiring v+ to the unused inverters?  I grounded the inputs of the three inverters not used.  Do I want to also wire the outputs to v+?  My knowledgebase is rudimentary after ohm's law.  Transistors still baffle me...:oops:

link:  http://www.freewebs.com/martyb/

MartyB

That'd be pins 6, 12 and 15 tied to 9v+, right Mark?   I figured a way around the file exporting thing in ExpressPCB I think.  I'll re-do the board in reverse as a silkscreen layer only, no dots, send it to clipboard as a bitmap, the use my freeware to turn it into a .jpeg.   A test of this worked anyway.   If possible I'll get this stuff done tomorrow afternoon.

MartyB

Peter Snowberg

Don't connect the outputs! They're for out only.

As long as you have the inputs at the same potential as either Vss or Vdd, you're all set. :D

When CMOS inputs are at Vss or Vdd, the gate will draw very little current. If the inputs are between those levels, the gate will draw much more power and my oscillate out of control. That oscillation leads to a condition where the chip substrate gets reverse biased and when that happens the chip stops working.

Take care,
-Peter
Eschew paradigm obfuscation