Rebote 2.5 delay with tails and modulation (another epic journey thread)

[deadastronaut]

right, i had a tinker with one of  the ''middle stages'' before i ripped it all off the breadboard,

and this is as minimalist as i could get it, whilst still behaving ok..


the input / output stages will be full on filtered etc...



edit: 1k from pin 6 goes to digital ground...the only ground is pin3 analog ground.

well they work as 2 stages between, need to tweak the filtering now...

anyone for 5 pt's while i'm at it?..

[tubeguy]

And why not to vary, increasing, the resistance at pin 6 of the four pt´s, can be with 2 dual pots  

[psychedelicfish]

do you mean ''current mirroring'' as sam mentioned earlier ..?  (i also read that elsewhere.)

Yes

with the pt's time control i just put a 1k to ground to fix each pt's 'time' and just control delay from pin 6 pt4 only...(no lock up problems at all)

So you're getting ~40mS delay from the first three chips and whatever the pot gives for the fourth chip? Surely its worth the couple of extra parts needed to use current mirroring? Current mirroring would allow the delay time of each chip to be varied with one pot, and would also let you get the minimum and maximum delay times out of each chip. That's quite a bit of extra flexibility for not much extra in parts. While I agree (in most cases) that less is more, when adding just a little bit more gives lots more flexibility to a design, that little bit more is always worth it.


When you get to the point of a final design, make sure your PCB layout has space for a resistor or a jumper from pin 4 to pin 3. Your PT2399s seem to include the internal resistor from pin 3 to pin 4, but some PT2399s don't and need to have pin 4 externally connected to pin 3.

Also, why is the junction of the 3 10k resistors grounded in your schematic?

[deadastronaut]

do you mean ''current mirroring'' as sam mentioned earlier ..?  (i also read that elsewhere.)

Yes   :  ahh ok.

with the pt's time control i just put a 1k to ground to fix each pt's 'time' and just control delay from pin 6 pt4 only...(no lock up problems at all)

So you're getting ~40mS delay from the first three chips and whatever the pot gives for the fourth chip? Surely its worth the couple of extra parts needed to use current mirroring? Current mirroring would allow the delay time of each chip to be varied with one pot, and would also let you get the minimum and maximum delay times out of each chip. That's quite a bit of extra flexibility for not much extra in parts. While I agree (in most cases) that less is more, when adding just a little bit more gives lots more flexibility to a design, that little bit more is always worth it.  : i'll give that a go then, makes sense if i can squeeze the max out of it.)

so lift that from the zero point delay (for example)  for all four pt's then.


When you get to the point of a final design, make sure your PCB layout has space for a resistor or a jumper from pin 4 to pin 3. Your PT2399s seem to include the internal resistor from pin 3 to pin 4, but some PT2399s don't and need to have pin 4 externally connected to pin 3. :okey dokey

Also, why is the junction of the 3 10k resistors grounded in your schematic?  ( human error...i now have a cap to ground)

[deadastronaut]

ok, so the current mirror ( control by 1 pot ) like this then?...

what is the diode section doing?, and should that be duplicated between Q2/Q3/Q4 ?

[samhay]

I take it you borrowed that from the madbean Zero Point dual delay, so it's tried and tested.
looks like the 'diode section' gives a slow start-up to prevent the PT2399s from latching - pin 6 needs a relatively large effective resistance when the chip is powering up.
You will probably want to play with the value of R10 to set an acceptable max delay time - bigger = longer

[deadastronaut]

cheers sam, yep blatantly pinched from the ZPD..

ok, i think i get the idea on that diode lark now...

i'll try 3904's on it, see how that goes.

i noticed that the emitter resistors went up in value slightly on the ZPD ...? 560r,  620r, ....?

edit: so i go back to sticking digital ground to ground then.....

[samhay]

It looks like the 560R/620R resistors were chosen to be mismatched in order to stop the chips clock's heterodyning - each chip will have a slightly different delay time/each clock will be out of step. To save on any suprises, I would suggest you use different values for each PT2399.

I don't think the choice of NPN is very critical and I guess the noise was not objectionable when using audio ground for everything. I guess you will hear if this is not the case for you.

[deadastronaut]

well it works, but minimum delay is not 'tight' like reverb...more like what i had kind of 'slapback'

and max delay isn't as long...using a 1M pot/trim..

think its going to be a juggling act to get it to fastest and (acceptable) slowest..

[deadastronaut]

this is with 1M trim/pot, and switching a 100r in series for fast...then switching a 1M in series for slow....it wil go slower...with a 2.2M

but the fastest is not really fast..

https://dl.dropboxusercontent.com/u/7464107/dely4pts.mp3

[psychedelicfish]

If you're using current mirrors you don't need the 1k resistors. Lock up is something to do with the start up cycle of the PT2399s, which is about 500mS if my memory serves me correctly. The idea with the capacitor is that it takes some time (>500mS) to charge up, so the transistors look like a larger value resistor while the chip is starting up.

It looks like the 560R/620R resistors were chosen to be mismatched in order to stop the chips clock's heterodyning - each chip will have a slightly different delay time/each clock will be out of step. To save on any suprises, I would suggest you use different values for each PT2399.

Surely the variations in HFE between each transistor would vary the clock frequency enough?

[psychedelicfish]

Actually, with the delay time pot at minimum in the circuit shown:

t = R * C

t=2.2e3*1e-6
=0.0022s
=2.2mS

Which is the time it will take for the voltage across the capacitor to reach the full 5V. That's way too short to stop the chips locking up.

If you used 100k and 10uF:

t=100e3*10e-6
=1s

That would be enough to slow the voltage rise on the bases of the transistors so that the chips wouldn't lock up when started on minimum delay time, but 100k is going to affect the base current (and therefore delay time) way too much. This is where you need a transconductance device (like a FET) to do the controlling, because it doesn't matter what resistance you have in your RC circuit as the control pin (gate in the case of a FET) doesn't draw much, if any current. The problem with FETs is that they vary wildly and biasing them into their ohmic regions would be a nightmare (the reason you normally need matched FETs for a phaser).

Anyway, that's my rant over, and here's an idea for what you could do:

R1 and C1 form an RC circuit that takes 1s to reach the full 5V when power is applied to the circuit. The MOSFET, which can be your bog standard 2N7000/BS170, will turn on slightly before 5V on the gate (when the gate voltage reaches 2.1V, in the case of a typical 2N7000). When the MOSFET turns on, the emitters of the transistors are connected to ground, giving you a "resistance" from pin 6 of each chip to ground.

The pot will probably need some tweaking; it may need a series resistor, or it might need a resistor from the bases to ground. I would try it just with a 1M pot to start with, and tweak it to get the best control.

[samhay]

well it works, but minimum delay is not 'tight' like reverb...more like what i had kind of 'slapback'

and max delay isn't as long...using a 1M pot/trim..

think its going to be a juggling act to get it to fastest and (acceptable) slowest..

Your minimum delay time will be the sum of the minimum delay of each PT2399, which is not that short to begin with. Why not tap the output of the first PT2399 and switch this in for shorter delay times? - this will cut down the noise too.

[kingswayguitar]

holy cow

[deadastronaut]

Yeah, cool ideas guys...i,ll try without the 1k,s anyway, but tapping off might be a good option too...

got hangover today, so ill try those a bit later...

saying that though, the way i had them wired with one pot control seemed to work fine....but in for a penny etc...cheers guys.

@kingsway. Holy cow indeed...sounds excellent. I go to tinker and end up just playing for ages...now that's a good sign ...



edit: tried that fet lark with the npn's...i couldn't get it to work, no delay etc...saying that i should have took power off and then re-powered it..hmmm...

anyway, i went back to the 1k's from pin 6 to digi ground, ,has good control fast/sow, had no problems, and can control delay of all pt's with a 250k pot from pt4  lugs 2/3 joined with a 1k to ground on lug 1.

i tried 5 pt's btw, but the additional 'useable' delay wasn't really worth it....so back to 4 it is.

[bluebunny]

i tried 5 pt's btw, but the additional 'useable' delay wasn't really worth it....so back to 4 it is.

Aw!  I was going to resist temptation and hold off building anything until at we had at least 30 pages in this thread, and at least double-digit PTs!

[deadastronaut]

^ give it time...

while i'm at it...

ive been on a buffered bypass quest with this, just testing out the 'tonal differences' (compared to TB)...ive tried the rebote, merlins small time, and tubeguys..just to see the differences..

yeah i know, pretty anal, but i'd rather add to my guitar from the standpoint of just guitar ( i guess some would call ) transparent?...... i was just thinking about which

is the '' most natural, non tonally different'' buffered bypass circuit?......if one exists, ive been tweaking about with these, but just curious as to what is the bog standard tried n tested buffered bypass...thoughts?

[psychedelicfish]

I assume from the thread title that you want tails, so here's a list of some of the things you might be able to use to cut off the input of the delay lines:

• JFET
• Multiplexer IC
• LDR
• Mechanical

I personally would choose in the order of that list. FET switching is nice and simple and works well, but can cause minor distortion. Multiplexer IC switching might work a wee bit better, but is far more complex. That being said you could use the extra switch sections of the IC to give you electronic "true bypass" (or as I like to call it, hard bypass) as well. LDR switching would work, and you wouldn't have any problems with complexity or distortion, but then you have to mess around with heatshrinking LEDs to the LDRs, and you'd also have problems with the variability between LDRs. Mechanical switching is far less sophisticated (one of the reasons why "true bypass" is so popular) but gives you problems with switches popping. Even if you get no popping problems too begin with, as switches age they can develop mechanical problems that results in popping.

That's my opinions anyway, here's some links about the above switching mechanisms:
http://www.geofex.com/article_folders/cd4053/cd4053.htm
http://sound.westhost.com/project145.htm
If you need to know anything about how FET switching is done, take a look at one of Merlin's designs, like the Small time. Mechanical switching should be pretty straightfoward.

[deadastronaut]

yep, ive already tried the fet switch...works fine. (page 1)

i'm just tinkering with the buffers at the mo...

[deadastronaut]

man, had to draw the schemo on 4 seperate images.. ..the buffers are lifted straight from merlin, thanks man , and ive read various hints and tips on the pt2399.

note the 220nf on the last PT..it lifts the delay nicely, and the varying resistors on input stages do too...keeps it from being too dark.

just need to draw up (and re-test) the lfo too now.....









i changed the title of this thread, as its real purpose was buried in a rebote thread,  unless of course there is no interest in a long delay, .. if so, i'll crack on anyway regardless..