I'm struggling with a cabsim build..  not very typical, it uses a delay line. The cabsim part works perfectly but I have a problem with a delay line. It's dead quiet at the output from DL.. And now I'm looking for a simpe way of checking the ICs. I  have BL3207 (bought locally) and MN3102 from aliexpress. Here's the schematic.
Any advice? Is there a simple circuit for the 3207/3102 pair?

T.

I had the same question when I obtained a load of mn3204 BBDs

Schematic by the great Scruffie in this thread

I've just taken a look at the schematic. Only run one BBD at a time to avoid confusion and see if it's the BBD or an error in the channel.

The BL3207's bias point might be too far off from the MN3207. Since it looks like the two delay lines run off of a single bias point you might have to find a work around if that is indeed the problem. The circuit seems to rely on the BBDs having to be identical enough to not have a bias control and is hardset in the circuit design instead of using trimpots to set individual bias points per BBD - which is silly/lazy IMO.

EDIT: There's two delay paths - is only one working? Or neither? Sorry I'm confusing myself making assumptions. For some reason I though you had a MN3207 and a BL3207 running together. But the bias point does seem to be hardset which assumes every 3207 BBD has the same bias point - which is a design flaw.


I'm sure more savvy folks will chime in to lend a hand. Just my 2-cents.

I have tried with two delay lines, one delay line - no difference. So I'd like to test the ICs  in  a different circuit (especially ICs from aliexpress). Thank you for the link, I'll have a look. 

T.

The schematic I made for Kevin there is a 'working effect' it doesn't even have to be that complicated if you're just testing them.

Assuming you have no scope, if your multimeter has a frequency counter you can test the clock frequency coming from the MN3102 and see if it varies with the dimension pot, that would give you a reasonable idea of if it was working.

I'm looking at the MN3102 datasheet now. I might be able to measure frequency with a sound card scope but I also have a DMM with a freq counter.

T.

You can try my echopathetic delay circuit.
I posted it here; and kind forum member made a layout on effectslayouts.blogspot.

I got the idea from an old contest post by a member (forgot the name) who made a super stripped down analog delay. It's very simple, and dirty sounding; but it's a great bbd tester.

Quote from: Kevin Mitchell on April 19, 2018, 04:29:50 PM
I've just taken a look at the schematic. Only run one BBD at a time to avoid confusion and see if it's the BBD or an error in the channel.

The BL3207's bias point might be too far off from the MN3207. Since it looks like the two delay lines run off of a single bias point you might have to find a work around if that is indeed the problem. The circuit seems to rely on the BBDs having to be identical enough to not have a bias control and is hardset in the circuit design instead of using trimpots to set individual bias points per BBD - which is silly/lazy IMO.

EDIT: There's two delay paths - is only one working? Or neither? Sorry I'm confusing myself making assumptions. For some reason I though you had a MN3207 and a BL3207 running together. But the bias point does seem to be hardset which assumes every 3207 BBD has the same bias point - which is a design flaw.

I'm sure more savvy folks will chime in to lend a hand. Just my 2-cents.

I don't agree that using a fixed bias point is silly/lazy or a design flaw. I did some experiments with various MN3207's (Original Panasonic, V3207, something else I don't remember - but not the BL3207, as it happens) when I was designing the Flangelicious and decided that it wasn't worth adding a trim for it. In some cases there was a marginal improvement, but in most cases I couldn't really tell. It also depends what your objective is - for that circuit, I was trying to build the simplest beginner-friendly flanger I possibly could, and adding a trim that people don't really understand and don't have a simple way to tell whether it's "set right" or "working" isn't helping at all.

All that said, if I was trying to build an analog delay with two MN3205/V3205's I'd probably put separate bias trims on each one. In that case, it's not going to be a simple circuit, and you need any improvement to sound quality you can get even if it's marginal!

€0.02,
Tom

Quick update.

The ICs are OK. Now it's time to breadboard the cabsim again and make it work with a DL. Thank you all for your help.

T.

Good news - it works with a cabsim. Bad news - it oscillates with dual DL. It's like tuning AM radio or listening to the madman's synth (while rotating the MN3102 "Dimension" potentiometer) . It does not oscillate all the time - touch the potentiometer and it's quiet. Put your finger too close to the wires on a breadboard and you got a symphony. There is some potentiometer settings when it's quiet too.

T.

That sounds like it could be interaction between the two clocks. Although the two frequencies are well above audio, the difference frequency is audible, so any interaction between them is going to be heard. It *is* a lot like tuning AM radio, and it's not an "oscillation" as such - more like how a bat detector works, in fact!

You want to keep the two delay lines and their clocks as far apart as possible and get a good ground in-between them to help isolate them.

HTH,
Tom

Short recording from cabsim output, two delay lines connected. It's a full rotation of a "dimension" potentiometer.
File on Soundcloud.

Couple of frequency response plots put together.



T.

That's definitely clock noise. Better filters after the delay lines will help, and good balancing of the two signals coming out of the delay line - that's one place I would always put a trim, and on the cabsim schematic, they're just hard-wired together.
Maybe try the arrangement with a trimmer there instead, like this:

https://electricdruid.net/wp-content/uploads/2015/06/Flangelicious-Pg2.jpg

Note that the two 100K resistors would be in parallel if pins 7 and 8 were connected together - hence the 56K in the cabsim schematic. I've seen the same thing a few other places. The 10K clock balance trim can reduce output clock noise quite a bit in my experience.

HTH,
Tom

Thanks Tom.  I'll try with a trimmer.

T.

Quick update.

Adding a trimmers helped a little bit with the interference (it's quieter), but it also weakened the effect of the DL. The frequency response plot still has  peaks and valleys but they're less pronounced.




T.

There's less than +- 1dB difference...
I bet your ears won't complain...

BTW
the higher the load resistance the higher the BBD output signal,
otherwise you may add a current buffer

Regarding reducing heterodyne noise due to clocks running at different rates.
Even more important than filtering the outputs of the delay lines is to keep the two **input*** pins to the delay lines isolated.  i.e. do not connect them directly as in that schematic.

The reason is that the BBD sampling process takes place at the BBD input.  Clocking the BBD to take an audio sample actually affects the input line (i.e. some clock signal leaks onto it) and that clock signal will then get affected by the sampling process at the other BBD input.
If this gives a heterodyned tone in the audio range (say at 1kHz) then you would not be able to remove that by filtering after the BBD without also throwing away wanted audio.  So its important to kill unwanted clock noise at the input to the delay line.

I would put ***separate*** RC filters on the two BBD inputs. So any clock signal that leaks out of one input gets filtered (in the following example by 200k and 150pF) before it reaches the other input.

e.g.   

      -----100k------+-------> BBD_IN 1
      |             150pF
      |              |
      |             Gnd
In---+
      |
      |
      |
      -----100k------+-------> BBD_IN 2
                    150pF
                     |
                    Gnd


Thanks DrAlx. I didn't know about the effect and that's very interesting. Makes sense now you mention it. I should have a look at the internal schematic of the delay line.

DrAlx - turns out that isolating BBD inputs it's a good idea. Thank you. It's quiet most of the time, or the interference is very weak. Moving the layout from breadboard to the PCB could fix the issue completely.

T.

Another question regarding BBD. I have noticed that presence of the DL line affects mainly low to mid frequency range. If you take look at frequency response from the cabsim, there is a very little or no change in the HF region. Of course it depends on the "dimension" potentiometer setting but any change to the freq response is visible in a very narrow range the "dimension" rotation, then it dissapears. Looks like  all the peaks and valleys shift to the "left". Why? Is it just physics or there is some filtering happening inside the ICs? Or maybe it's RMAA unable to display/capture subtle changes and evens out the freq response?

Frequency response characteristics for different setting of the "dimension". White plot - it's a cabsim without DL.


And short animation


T.