Strange issue stacking common source JFET amplifiers on breadboard

[Twhjelmgren28]

Hey all,

I'm still fairly new to DIY pedals although I do have a few builds under my belt now.  I have been attempting to stack common source JFET amplifiers on the breadboard just to see how they interact and overdrive.  I was using j201s.  The first JFET was super easy to bias but I couldn't for the life of me get the second JFET amplifier in series to bias properly. After spending a couple of hours trying different trim pots and fixed resistors to bias I discovered something weird... If I touched my signal out lead to the side of the coupling capacitor leading into the second amplifier, boom, id have an output signal and I could go back and get the second JFET amplifier biased. And wouldn't you know it, both transistors biased with the exact same resistance (i think that would be the correct terminology here).

So then I realized anytime I touched a component on the breadboard, the signal would completely cut out.  I'd have to touch the output signal lead back to the coupling capacitor / gate of the second JFET to get the signal back.

Does this seem normal? Am I dealing with a faulty transistor or does this have something to do with how the gate operates?  (At least I would assume it has to do with the gate of the second transistor as that is where the coupling cap leads into the second amplifier)... Follow up question, if this is normal, how do you work around it when stacking JFETs?

Appreciate any insight!   Feel like I should be able to figure out what's up but I need your expertise!

[Fancy Lime]

Hi Tommy,

what you describe is a common problem with breadboards, regardless of what you build on them. The connections of the components to the breadboard are just "metal touching metal", which is not a very reliable way to make an electrical connection. Therefore you can get substantial parasitic resistances at these connections. For some circuits or parts of circuits, a few more Ohms or Kiloohms is no big deal. But the extra resistance may be a lot higher than that, depending on how new and clean and high-quality your breadboard is, if the leads of the components are ever so slightly corroded or dirty and so on. Something that works one day may stop doing so the next because the humidity in the room has changed. For circuits that are a bit touchy with biasing anyway - like JFETs - this can become relevant more quickly than for others. I often have the same problem. After lightly tapping the board or touching some components, it goes away for a bit. Or it doesn't. Sometime when the problem persists, I just take everything off and rebuild it somewhere else on the board. So no worries, you're not alone. I'm afraid that is one of the nuisances of breadboarding for which there is no real one-size-fits-all solution other than: try again.

That does not mean there could not also be something wrong with a transistor but I would say the breadboard just being a breadboard is the more likely cause of your woes.

Hope that helps,
Andy

[merlinb]

Sounds to me like a leaky coupling cap, or simply a build error like a missing pull-down resistor on the JFET's gate?

[Fancy Lime]

Sounds to me like a leaky coupling cap, or simply a build error.

Good point! What type is the coupling cap? Film, ceramic, electrolyte, tantalum?

Andy

[iainpunk]

i have a hunch its a missing pull down resistor, i have had the exact same problem/solution in the past whenever i forgot pull down resistors.

good luck!

[Twhjelmgren28]

Thank you for the responses!  I think you guys may be right about the pull-down resistor.  I didn't know I needed one between the 2 stages.  This is essentially what I have stacked up (I'm using non-polar film caps, however): 





I don't have another pull-down resistor going into the 2nd stage however.  I assume that's necessary?  Would I use the same value that I used going into the first stage?

When I've read about pull-downs, it always seems to me it is there to keep the pedal from popping when engaged - What other function does it have?  I'll read up on it a bit more; I think it was geofx that has the really great write-up on what each component does in a circuit.   

[anotherjim]

In that single stage, R3 is to reference the gate to 0v and R2 has to have enough current flowing through it for the FET source to become more positive than the gate. This is all to do with biasing the jfet and not anti-pop of the input or output capacitors. This is -Vgs. The "-" is important as it tells us that the gate voltage must be more negative than the source voltage. When there isn't a negative supply voltage to make the gate actually negative, then it relies on the source being more positive than the gate. This is the same thing, the gate is still negative with respect to the source.

If you add a second stage, you must repeat the gate pull-down, although as long as that is a high value, you should be able to use a smaller coupling cap than that 4.7uF. If the pull-downs are 1M, then 10nF caps are plenty big enough for coupling.

[iainpunk]

If you add a second stage, you must repeat the gate pull-down, although as long as that is a high value, you should be able to use a smaller coupling cap than that 4.7uF. If the pull-downs are 1M, then 10nF caps are plenty big enough for coupling.

im normally not one to nitpick about component values but i don´t recommend 1M and 10nF, especially the 1M. high resistances tend to be quite noisy, and a factor 10 in resistanceis a factor 14,15 more noise. i recomend 100k and 100nF based on my experience.
EDIT: those values have the same cutoff frequency of 15Hz

[Twhjelmgren28]

Okay, I think I got it.  So generally speaking, in order to bias a JFET, a pull-down resistor is required in order to make the source more positive / the gate more negative than the other pin.  Generally, the values for the input / coupling caps and resistors can be the same with each gain stage. 

This pull down resistor, coupled with the capacitor is also making a high pass filter so there are obviously multiple reasons for choosing the correct values, correct? 

Additional follow-up questions / points:
1. When going into the 2nd clipping stage, I assume the pull-down resistor would go after the coupling cap, essentially exactly like the first stage...
2. I've also seen pull-down resistors after the gain stages as well - once again, I've read that this can help reduce pedal popping noise.  Any other reasons to consider for putting a pull down there? 


Heads-up, I didn't use a 4.7uF coupling cap - I think I've got a .1 uF there. 

[iainpunk]

Okay, I think I got it.  So generally speaking, in order to bias a JFET, a pull-down resistor is required in order to make the source more positive / the gate more negative than the other pin.  Generally, the values for the input / coupling caps and resistors can be the same with each gain stage. 

This pull down resistor, coupled with the capacitor is also making a high pass filter so there are obviously multiple reasons for choosing the correct values, correct? 

Additional follow-up questions / points:
1. When going into the 2nd clipping stage, I assume the pull-down resistor would go after the coupling cap, essentially exactly like the first stage...
2. I've also seen pull-down resistors after the gain stages as well - once again, I've read that this can help reduce pedal popping noise.  Any other reasons to consider for putting a pull down there? 


Heads-up, I didn't use a 4.7uF coupling cap - I think I've got a .1 uF there.

yes, you have got it, and yeah, it might be usefull to use one of the coupeling caps/pldwn resistors to remove some low end to prevent the pedal from becoming to muddy/fuzzy, especially if you dont intend to build a fuzz.

1)yes
2) this is only really a necessity at the end of a pedal, before the bypass switch, to prevent poping.
at other places in the pedal it might be better to use a bias resistor instead of a pull down, so that things like opamps can actually work properly, but this depends on the circuit blocks after these gain stages.

[Twhjelmgren28]

I really appreciate the help and insight!  Thank you to all!

[PRR]

> I don't have another pull-down resistor going into the 2nd stage

So how does that gate know where you want it to sit?

> high resistances tend to be quite noisy

The 1Meg gate resistor is, for AC, in parallel with the Drain resistor, which is typically a few k. For "lowest" hiss you want the 1Meg "much larger" than the few-k. 10Meg would be (insignificantly) lower hiss.

> a factor 10 in resistanceis a factor 14,15 more noise.

3.16. (square root of R) But again you need to look at the total effective node resistance, not any one part.

[merlinb]

im normally not one to nitpick about component values but i don´t recommend 1M and 10nF, especially the 1M. high resistances tend to be quite noisy,

Since you're an electrical engineering student you might need this handy rule in an exam:

When it comes to resistor noise you want the resistance is series with a signal to be as small as possible;
You want the resistance that shunts a signal to be as large as possible.

e.g: a pull-down resistor is a shunt resistor, so it needs to be larger for less noise. A gate-stopper is in series with the signal so it needs to be smaller for less noise.

There are of course other subtle factors that may place limits on how large or small these things can be, but the general rule above is where you start. Electronics is full of 'dual' or 'complementary' rules like this.

[Twhjelmgren28]

Since we're on the subject.  I have a separate but related question.  I'm curious how you guys calculate your source resistor for any given JFET.  I know there are a ton of resources online (not to mention a ton on this forum alone) but I'm really having trouble with the calculations, or more specifically, feeling confident that I'm inputting the correct values when attempting these calculations.  Not to mention, it seems that a lot of the different resources use slightly different variations on the calculations or one resource may rely on a datasheet while another is using physical measurements of the specific JFET. 

I've gone through the Small bear write-up on biasing JFETs and it's awesome; very comprehensive (http://diy.smallbearelec.com/HowTos/BreadboardBareAss/BreadboardBareAss.htm).  I get a bit thrown off adding the AA battery into the mix when measuring drain current vs. gate voltage.  After attempting to go through this a year ago, I finally reached out asked some follow-up questions.  I was informed that I could use a trimmer on the source, in addition to the one on the drain, to do a quick bias.  Loved that trick and it gets me to where I can actually use the JFET.  For example, with the stacked Jfets that I currently have breadboarded, I have an 8k2 on the source and 100k on the drain (both fixed resistors).  I like the sound but I also feel like those are a bit unconventional, at least when I look at other schematics using J201s.  It seems like a lot of them use 1k or 2k at the source.

Can't help but feel like I should be able to confidently calculate the source resistor, at the very least, without relying solely on trim pots.

Do you guys typically go through and calculate all of your component values when building something like this?  Or are you more likely to just trial and error using actual components and go by ear? 

I'd really like to understand what I'm doing here.

[PRR]

> how you guys calculate your source resistor for any given JFET.

You can't always start from "a given JFET". It just may not be suitable.

You pick the source resistor in light of the load you are trying to drive. Typically Rd can be 1/2 to 1/10 the load impedance.

Vd will be a bit above half the supply. (And VD is even more critical than the JFET, the "given" supply voltage may not be suitable.)

You *then* pick a JFET with Idss a little greater than Vdd/Rd, and Vp a little bigger than your peak-peak input.

[Twhjelmgren28]

Hey all,

Hoping some of you may remember this thread.  I actually still have this guy on the breadboard.  I took a long hiatus to build a couple of amps.  Super fun but I have the pedal bug again and a couple questions.

So, after I added a pull-down resistor, I was able to get that second JFET biased and the circuit worked but with a caveat.  I put the breadboard at the end of my pedal chain and it still works there BUT when I cut power to my pedals (including the prototype) and bring power back on, the breadboarded circuit doesn't work.  I then have to touch the coupling cap (again) in between the JFETs in order to get my breadboarded circuit to work again. 


I do have another question related to JFETs.  Do you always aim to get 4.5 volts (or there abouts) on the drain pins?  Do you just leave a 100k trim pot in the pedal?  Or can I get the JFETs biased on the breadboard and then figure out what fixed resistor(s) to put in it's place?  Why not use a voltage divider?




This is my schematic.  It did work with just 100k resistors from B+ voltage BUT every JFET schematic I see has a trim pot in place instead of a fixed resistor.

[PRR]

> when I cut power to my pedals (including the prototype) and bring power back on, the breadboarded circuit doesn't work.  I then have to touch the coupling cap (again) in between the JFETs in order to get my breadboarded circuit to work again.

What is the DC voltage at the Gate? There's nothing telling it where to sit. On a slow turn-on, stray leakage may urge the Gate to zero VDC. A sudden turn-off will throw the Gate way negative, JFET OFF. And gate leakage is so tiny that it may take days to bleed-off. Finger (or meter) will drift the Gate back near zero VDC and it works again.

Second rule of tube amplifiers: Every Grid Needs A Gridleak Resistor!!! For JFET, same, except spell grid "gate".

[Twhjelmgren28]

So I realize I have the wrong unit listed for R1. It is 1 Meg. So that is acting as the grid leak, correct?

I'll get back to you on my gate voltage(s).  In my limited understanding of tubes and FETs, I think what you're saying is gate has to be more negative than source but leakage is causing the gate to become positive so the FET can't function. How would I then fix that problem? Gate stopper resistors? (I'm trying to think back to the amps I recently built, so apologies if this is in way left field).

EDIT: Gate stoppers would filter high frequency, my bad.  Smaller resistors on the sources?

[PRR]

> I have the wrong unit listed for R1. It is 1 Meg. So that is acting as the grid leak, correct?\

I figured you didn't really have a milli-Ohm resistor. They are never in stock. (Someone is about to refute me, but it will be a funny-looking part.)

But look which side of C1 your R1 is!! There is NO DC path from Gate to anything else. The gate can wander off to almost any level it wants to. Not as far as CMOS can wander, but certainly to wont-work voltages.

[Twhjelmgren28]

Ahh - thank you PRR.  The more I think about it the more that makes sense:  if the input cap blocks DC, there would be nowhere for excess DC to drain off the gate since there isn't a path to ground (if I'm thinking that through correctly).

Last question (I promise):  Would the new resistor act as a pull-down so I can remove R1 from my original schematic?  I'm trying to logically think this through.  I assume the stomp switch popping sound is AC and thus could pass through that input cap and filter through the new 1 Meg.  Thus, I can remove R1 from my original circuit...Can anyone clarify?

Edit:  I suppose I could just leave R1 from the original schematic in - I guess it doesn't hurt...