Author Topic: Choosing the right JFET for source follower.  (Read 203 times)

Fancy Lime

Choosing the right JFET for source follower.
« on: October 17, 2020, 02:28:23 PM »
Sorry for the silly question, I seem to be too tired for my brain to function properly. When picking JFETs for buffers, do I want to pick high Idss or low? High Vgsoff or low? Sure, it does not matter as much as for common source stages but still. And yes, I can set the bias point and source resistor after picking the device, so that does not limit my choices. My gut tells me I'd want low Vgsoff for closer-to-1 gain but low Idss for lower noise. My frontal lobe tells me me to get some sleep. But my lizard brain tells me sleep ain't happening until I know which JFET...

Thanks,
Andy
« Last Edit: October 17, 2020, 02:31:47 PM by Fancy Lime »
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Rob Strand

Re: Choosing the right JFET for source follower.
« Reply #1 on: October 17, 2020, 09:04:38 PM »
Other requirements to noise and gain are: distortion, output impedance, expected signal voltage, expected current drive on the output.    Heaps to consider.

The most intuitive result I could give is if you imagine the output impedance of the buffer being low, the gain will be high.  The gain is slightly less than unity and the "lost" voltage appears across the gate-source, that's the voltage swing applied to the actual JFET.   If the gate-source voltage is low then you would also expect the distortion to be low.

The output impedance depends on the JFET and the bias point.   The JFET part is rds0 = 1/yfs0.      The bias point part gives the output impedance as ro = rds0 * sqrt(IDSS/ID).       Since rds0 = VP / (2*IDSS),   you would lower the rds0 part by using a low VP and high IDSS JFET.    It's still not clear where you stand overall with ro as sqrt(IDSS/ID) will rise when IDSS is high.   If we write ro out in full we get ro = (1/2) VP/ sqrt(ID IDSS) so large IDSS still helps.

Because we want roughly Vsupply/2 at the source, and if we fix RS then  ID = (Vsupply/2) /  RS is pretty much fixed anyway.

So that points to having high IDSS and low VP.    The low VP is interesting since usually large VP is associated with lower distortion - need to think about that one.

There are some conditions imposed on the design:

- For full output swing the JFET needs to supply a current at least Vsupply / RS.   Since the JFET current limits at IDSS we need IDSS > Vsupply/RS.   If we have an AC load as well then the JFET needs to supply more current than that.   That means IDSS needs to be largish, which doesn't go against the result above for the buffer.

- Another limitation is when the JFET drain source voltage approaches VP the JFET starts operating as a controlled resistance and the positive peaks will distort.     The above requirement for small VP helps maximize swing with a low supply voltage.    If you were to use a high VP JFET you might consider biasing the output at lower than Vsupply/2 to get a more symmetric swing.

- The AC load needs to be considered in general.  But that seems to be covered by the high IDSS.  It does mean you might need a lower RS which will change the gain and distortion.
« Last Edit: Yesterday at 03:39:04 AM by Rob Strand »
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Vivek

Re: Choosing the right JFET for source follower.
« Reply #2 on: Yesterday at 12:19:04 AM »
A) Is there a possibility that this beats an Opamp in terms of  input impedance, output impedance and noise ??

B) is there any real advantage of using a FET and Opamp together, in similar fashion as TC electronic Integrated preamp. One of the Elmers had earlier posted FET/OPAMP config.

Fancy Lime

Re: Choosing the right JFET for source follower.
« Reply #3 on: Yesterday at 04:03:37 AM »
A) Is there a possibility that this beats an Opamp in terms of  input impedance, output impedance and noise ??

B) is there any real advantage of using a FET and Opamp together, in similar fashion as TC electronic Integrated preamp. One of the Elmers had earlier posted FET/OPAMP config.
I have been asking those questions in the past.

A) noise *can* be better with a single JFET if you can get a good low noise type like 2sk170 or 2sk117. Beware of fakes, though. The real ones are increasingly difficult to get. I happen to have a few, hence my question. Impedances are always going to be better with a decent JFET-input opamps. Even a humble TL072 will outperform the best discrete JFETs in those respects by orders of magnitude.

B) there used to be when opamps were in their infancy but with modern opamps I see no reason to go to the extra trouble with strange biasing and whatnot. Modern audio opamps with JFET inputs are amazingly good. However, for guitar effects or amps, even an old TL072 is good enough so that the opamps choice is not the limiting factor for overall performance. You can use a better one but you will almost certainly not be able to tell a difference in a blind A/B test. I tried. Extensively. The only real difference was bandwidth way above audio, therefore irrelevant. There are also technically slight differences in low frequency noise but those are way too small for me to hear. So do as I did after extensive lecturing by PRR and R.G. and simply enjoy the fact that even modest past-1970s opamps are actually way better than we would need them to be to make any real difference. At least in guitar audio and as long as the circuit is designed according to the opamps specs.

@ Rob
Thanks! Well, we always want the lowest possible Vgsoff at a given Idss or the highest possible Idss at a given Vgsoff, don't we? That's what makes the 2sk170 and it's peers so interesting. But within any given type of JFET, Vgsoff and Idss have a fixed correlation. Correct me if I'm wrong. So my question was more, if I have to choose between lower Vgsoff or higher Idss, which do I prefer for a buffer? Your musings are a great guide to buffer design in terms of the relevant parameters and resistors, btw. Thanks! I did not even think about distortion until now.

Andy
My dry, sweaty foot had become the source of one of the most disturbing cases of chemical-based crime within my home country.

Rob Strand

Re: Choosing the right JFET for source follower.
« Reply #4 on: Yesterday at 05:08:13 AM »
Quote
Thanks! Well, we always want the lowest possible Vgsoff at a given Idss or the highest possible Idss at a given Vgsoff, don't we?

Well at least for the buffer.   For the common-source type amp I'd have to think about it.
 
Quote
But within any given type of JFET, Vgsoff and Idss have a fixed correlation. Correct me if I'm wrong. So my question was more, if I have to choose between lower Vgsoff or higher Idss, which do I prefer for a buffer?

Based on the previous argument we can use the output resistance ro as a guide.

Since,

       ro = (1/2) VP/ sqrt(ID IDSS)

If we say for a given model of FET the parameters scale with 'a' as

        VP = kV * a^2  and  IDSS = kI * a^3

where, kV, kI are constants.

then

    ro = (1/2) kV a^2 / sqrt(ID kI) / sqrt(a^3)
         = constant * (1/sqrt(ID))  *  sqrt(a)

so for low ro we would choose a lower 'a' and that means the lower VP and IDSS.

This is a first order approximation.   IIRC the scaling of VP and IDSS doesn't quite follow powers of 'a' I've indicated for VP and IDSS, especially when VP & IDSS are at one of the extremes (can't remember which end  ::)).   The square root varies slowly so the gains for smaller VP's are small over other VP's.   Also, we don't want to choose an IDSS so low that we can't get full output into the load + RS - as per design constraints at the end of the previous post.

FWIW, it would be worth verifying this conclusion.
[EDIT:  In spice, I scaled three JFETs according to 'a' and the lowest 'a' had the highest gain and lowest distortion.
             So, assuming the scaling powers are correct, the conclusion holds that using the smallest VP (and IDSS) is best. ]
 
« Last Edit: Yesterday at 05:42:40 PM by Rob Strand »
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PRR

Re: Choosing the right JFET for source follower.
« Reply #5 on: Yesterday at 11:51:58 PM »
There's 12 different ways to bias a JFET. You think it matters?