Help needed with Rat clone - JFET not passing signal

[Catacomber]

Hello,

I'm new to the forum and relatively new to the world of building stompboxes, but I think I am seriously hooked on it.  Built my first one from an Amazon kit about a year ago and now I've got a bench set up with a reasonable set of supplies and I'm working from manufactured PCBs. 

I have a EE degree from 1986 and have always wanted to get my hands dirtier with analog electronics after a long career in software engineering.  Between what I never learned and what I have forgotten in 35 years, I will be the first to admit that I'm not an expert in small-signal analog electronics.

After successfully building a Distortion + (yeah, I know that's the easiest one) I am working on Rat using "La Rata" from Tonepad.  As near as I can tell it's identical to the original schematic.

Using a homemade audio probe and a small guitar amp, I have determined that I'm getting signal past the op amp and to the gate of the JFET.  The distortion knob seems to smash the signal nicely, and that signal is about the same whether measured on pin 6 of the LM308 or at the gate of the JFET.  I have 9V on the source, and I would expect the drain to have my signal on it.  But interestingly when I probe that I get nothing at all, not even the noise that is present when I probe ground.  Yet with the JFET out of the circuit, I measure the correct 10K ohms to ground.

I tried a second 2N5458 to see if it was a bad component, but the result is the same, so unless they are both bad I must have an error somewhere.

I did notice that the Rat clone on generalguitargadgets.com has a JFET bias circuit added and from a bit of reading I understand (and somehow seem to remember from my lab days) that JFET biasing can be touchy.

Does anyone know what kind of DC voltage I should be seeing at the drain of the JFET?  Any other helpful hints?

I would appreciate any help - I have enjoyed reading the answers to other posts as a guest for several months now and I'm happy to be posting as a member.

Thanks!
Catacomber

[Catacomber]

Forgot to add, original schematic at https://www.electrosmash.com/proco-rat

Schematic with JFET bias: http://www.generalguitargadgets.com/pdf/ggg_rodent_sc.pdf

[antonis]

Does anyone know what kind of DC voltage I should be seeing at the drain of the JFET?  Any other helpful hints?

Hi & Welcome..

Drain should sit on +9V 'cause it's directly fed from power source..
(Considering R14 voltage drop negligible..)

Q1 serves as Source follower (output buffer) so you should get on its SOURCE signal of slightly less than that of clipping diode pair upper point..

P.S.
Q1's Gate is biased at 2.8V for a more symmetrical Source swing due to +/- 650mV (or so) Gate signal..
(you could replace R12+R13 with a trimpot for more presice bias, if you wish to..)

[idy]

Welcome

The place I went for basic buffer knowledge is:
http://www.muzique.com/lab/buffers.htm

The arrangement with the gate biased to mid voltage gives more head room. If yours just has a (1m) resistor to ground there, you might try a 1m to 9v. Or a pot.

[Catacomber]

Thanks, Antonis!

I got my source and drain mixed up in the original post - Drain is at 9V, Source is currently showing in the 25mV range (essentially zero), and my Gate is only at about .6V so I think something is up with the biasing of the JFET.  I will double check all the components between the op amp output and the JFET Gate and report back if I find anything.

And thanks idy! I will check out that link and try pulling up the gate voltage to see if that helps.

Thanks again!

[antonis]

I will double check all the components between the op amp output and the JFET Gate and report back if I find anything.

You don't have to, as long as you get signal on Gate..

I'm getting signal past the op amp and to the gate of the JFET.  The distortion knob seems to smash the signal nicely, and that signal is about the same whether measured on pin 6 of the LM308 or at the gate of the JFET.

Better check for R10 proper value/connection at first and then for R13/R12 DC voltage value..
(although Gate is misbiased according to GGG schematic, 600mV should be OK for a working Q1 buffer..)

[Catacomber]

Thanks, Antonis!

R10 as shown on the ggg schematic is correct, it measures dead on 10k ohms with the transistor out of circuit.

I also learned that I have 4.5VDC at pin 6 of the op amp (along with my signal), but then on the other side of the 4.7uF C7 I get nearly 0VDC due to the blocking action of that cap.  That 0VDC carries to the gate when the JFET is pulled.  With the JFET in place it's 0.6VDC.

Looking now for a clever way to add the 1M pullup resistor between the Gate and 9V.

[Catacomber]

Shoot.  Added a pullup 1M between Gate and 9V and measured 4.5VDC at Gate (so JFET has some bias now), but that didn't change any of the results.

Tried a couple of different JFETs from the same batch.  Even tried reversing one of them to see if they built them backwards.  When I probe the Source pin even the circuit noise goes away and I get nothing at all at my amp. Even if C10 were bad I would still see signal at the Source pin, right?

I will keep checking and report back.

Thanks,
Catacomber

[idy]

Any possibility you have fake FETs? Can you breadboard a buffer/booster and make sure? Some of us are fortunate to have testers that give security for transistor functionality... There are some ways to test them....

A lot of jets it *doesn't matter* source and drain, they are "symmetrical."

Sure there is no short there at the source? You have 10k to ground?

[GGBB]

What layout did you use? Or is it on a breadboard? Could you have possibly erred with the JFET pinout? Otherwise - all signs point to faulty JFETs. What manufacturer? Where did you get them? Have you tried them in a simple test circuit?

[percyhornickel]

Maybe your jfet is fake, it happened to me once. I received npn bjt´s labeled like 2N5458.

You should have 1.5V-2.5V in the source for 2N5458 real ones in the standar rat buffer.

Try just breadboarding the final buffer and measure the voltages (that´s what I did).

About the 1M from gate to 4.5V, you can use this way to get your buffer NPN BJT based too, I made this mod using a BC547B and worked great in a rat that I build for a friend. You can use almost any other normal bjt and if you want you can adjust the 10k resistor to your taste.

SALUDOS

[duck_arse]

Thanks, Antonis!

I also learned that I have 4.5VDC at pin 6 of the op amp (along with my signal), but then on the other side of the 4.7uF C7 I get nearly 0VDC due to the blocking action of that cap.  That 0VDC carries to the gate when the JFET is pulled.  With the JFET in place it's 0.6VDC.

this isn't right. there is a cap [ggg C9] between the 4u7 and the fet ggate, so the cap voltage should be 0V at all times. you do have that 22nF fitted, don't you?

PHOTOS of wot chu bilt, please, and also welcome.

[Catacomber]

Wow, thanks for all the great suggestions and pointers. I ordered the cheapest ones I could find, of couse from eBay and had to wait for them to come from China so absolutely fake is a possibility. I was just thinking about doing a quick breadboard test of the JFETs and then I saw idy's suggestion and that made me feel like I'm starting to think correctly. I am attaching some images. You can see the 1M pull-up I am using to bias the Gate, which I wire-wrapped to one side of R9 and wire nutted to the 9v supply.

I'm using the Tonepad board (La Rata), which is very similar to the ggg schematic with the exception of the biasing network (R12, R13, C14).





I will go off and test the JFETs using a simple buffer circuit, then I will report back. Thanks again to everyone for all your help with this!

[anotherjim]

Since the gate is one end of the pinout of that JFET (you can't just swing it 180deg), you can check you don't have a common BJT instead with your DMM diode test. If you can get a reading from the middle pin to each outer pin it probably isn't good. Swap the probes over to check either polarity.
There's an outside chance you have been sent JFET's, but with different pinout such as gate on the middle pin - that will also read like a BJT on diode test!

[antonis]

There's an outside chance you have been sent JFET's, but with different pinout such as gate on the middle pin

Kudos to manufacturer..!!!! 
(no mistaken transistor placement anymore..)

[Catacomber]

In diode test mode, my meter looks s showing a .65v drop from middle pin to each of the other pins. IIRC that is what an NPN transistor looks like, so maybe I've been had.

[PRR]

> a .65v drop from middle pin to each of the other pins

A JFET is one junction from either end. So that is normal for either N-JFET or NPN.

The D-S of a JFET will be hundreds of Ohms, the C-E of a NPN will be near infinity.

[anotherjim]

Yeh, as I said BJT and JFET can diode test from Gate or Base the same.
And as Paul points out, these JFET are normally "on" between Drain and Source while BJT is normally "off" between Collector and Emitter.
If they are faked from BJT's - at least you have learned some useful component identification tests.

[Catacomber]

Hmm.  I was hoping that anotherjim was correct and that just the pinout was incorrect, with the Gate in the middle.  But my DMM doesn't even move off of infinity when measuring across pins 1 and 3, either direction.  I even tried sticking the legs into anti-static foam to make sure it wasn't "pinched off".  Looks like I have a bag of unknown BJTs.    I will order some real JFETs from a more reputable supplier and let you all know how it turns out.

Thank you all for taking the time to comment.  My first post and already I have learned so much!  You all are awesome!

Catacomber

[Catacomber]

Just a quick follow up to bring closure - I found an old J202 lying around and I plugged it into the circuit, and lo and behold she works! Now I will just get the recommended 2N5458 at my leisure and plug it in later, for now I can finish this one up!

I would not have figured this out without your help!

Thanks,
Catacomber