JFET switching question...

Started by JP19, March 11, 2021, 10:30:04 AM

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JP19

Hi,

If I want to switch multiple JFET switches at the same time like this (see pic), what's the 'proper' way to do it? Can I just join the gates of the various JFETs together (and have 1 x diode/cap/resistor connected to the control signal), or do I need a diode/cap/resistor for each JFET?

I've breadboarded it with 2 JFETS and it does seem to work fine just linking the gates, but I wanted to check if I'm doing anything technically wrong!

Thanks  :icon_biggrin:


antonis

Taking into account practically zero Gate current, I presume a single resistor/cap/diode configuration should be fine.. :icon_wink:
"I'm getting older while being taught all the time" Solon the Athenian..
"I don't mind  being taught all the time but I do mind a lot getting old" Antonis the Thessalonian..

PRR

> Taking into account practically zero Gate current

That's the thing. The diode and gate back-to-back "can't work", except JFET gates are reliably "more zero current" than general purpose diodes.

Then if you put a LOT of gates together, so their currents add, you "could" have a gate-array more leaky than your diode.

Anything you would build at home is probably fine. But at some large scale you should admit that diodes are far cheaper than debugging leakage issues.
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Rob Strand

#3
Tying the gates together can work.   Some of the older Boss pedals did that.  On the whole though it would be safer to use separate diodes to each gate.  You don't need a separate 1M + 47n.

QuoteThen if you put a LOT of gates together, so their currents add, you "could" have a gate-array more leaky than your diode.
There's a lot of nasty secondary effects on the JFET switches which can do your head in.   Not to mention getting the on and off switches to overlap without having gaps.  Boss choose the VP wisely and they only pull the gates up to 6V or so.

Off hand the diode JFET leakage wars probably isn't a big deal.

When the diode is pulled high the diode leakage will cause the JFET gate junction to go forward biased a little bit.   The gate voltage will be fairly low.   If the JFET leakage was high the gate voltage would just get closer to zero.   The low JFET leakage does stop DC shifts through the 1M resistors to Vbias, but each JFET has those.  If the gate was floating, without any help from the diode leakage, the JFET would remain on.

One nasty effect has to do with the JFET gate "diode" charging the diode capacitance.   For example, suppose the JFET is on and the signal on the drain source goes negative.  The gate will forward biased and that causes the diode capacitance to be strongly discharged such that the anode sits at Vbias - signal peak.  Without any leakage the diode voltage would remain at that voltage.  Now when the drain-source goes high the JFET can cut-out because the gate is stuck low.   We are relying on the diode leakage to discharge the capacitances so that doesn't happen.   Too much diode leakage means the control signal can shift the DC voltage on the drain-source.

There's some fine balancing going on under the hood on these things.
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According to the water analogy of electricity, transistor leakage is caused by holes.

JP19

Thanks! Some great answers. I love this forum!