MN3011 Block in SpinCad Help.

[carvindc125]

Greetings!
I am currently working with a couple of brilliant gents on a project to modernize and bring back the Rockman X100.
We've been on the project over a year now and it is coming along quite nicely. While diving in to the circuitry we realized very quickly that the old MN3011 BBD chip it uses for reverb was not going to be practical to source. They are too expensive and nearly impossible to find.
So we began looking at digital options. Although I believe we have honed in on a couple ideas for our final echo design I discovered in a happy accident one day that spinCAD has a MN3011 block! The FV-1 can easily reproduce the chips characteristics however in another conversation Digital Larry brought up the block needs to be slightly redesigned. The 6 taps are summed together when it should be alternating taps summed to two outs. 1,3, and 5 to Out1 and 2,4and 6 to Out2
I don't know enough of the actual code to edit this but Digital Larry was kind enough to post the original code of the MN3011 in spincad.
Is there anyone here who can edit this so the taps are summed as Tap 1, Tap 3, Tap 5 summed to one output and tap 2, Tap 4, and Tap 6 summed to a second output.
Quote and code from Digital Larry below.

...Now that I look at it though I realize that the MN3011 block I designed is a little silly in that I mix all taps to a single output.  All this time and nobody ever said anything about it.  That is easy enough to change even manually.

I've used the MN3011 block as a reverb in more complex patches.  Unless you are playing really isolated guitar notes, to my ear, you can get away with a really simple implementation in many cases.

Code: [Select]

;
; ----------------------------
;------ Input
;------ Feedback Output
;------ MN3011
RDAX REG0,0.5000000000
RDAX ADCL,0.5000000000
WRA 0,0.0
RDA 7839,1.0
WRAX REG1,0.0000000000
RDA 7839,0.28183829312644537
RDA 932,0.5
RDA 1559,0.31622776601683794
RDA 2812,0.3981071705534972
RDA 4065,0.28183829312644537
RDA 6571,0.22387211385683395
WRAX REG2,0.0000000000
;------ FB In 1
RDAX REG1,1.0000000000
WRAX REG0,0.0000000000
;------ Output
RDAX REG2,1.0000000000
WRAX DACL,0.0000000000

[Ice-9]

Having a quick look though that MN3011 block I think it shouldn't be too difficult to organize the correct delay taps to the two outputs, I haven't looked at the X100 so one question I have is around the feedback path. How should this be taken into account? Will the feedback from all taps be common to both outputs? The MN3011 block from spincad looks like feedback is only from tap6.

[Ice-9]

A very quick edit of the code that you might try. I haven't looked much at it but try this and see how it might work. I am more used to using SpinASM so I had to first see what SpinCad was doing so I could very much be on the wrong track. I have added remarks to the code so that it might explain. I have not tested

Code: [Select]

;
; ----------------------------
;------ Input
;------ Feedback Output
;------ MN3011
RDAX REG0,0.5000000000 ;feedback register
RDAX ADCL,0.5000000000 ;read input left
WRA 0,0.0 ;write to head of delay

RDA 7839,1.0 ;read tap6
WRAX REG1,0.0000000000 ;write to reg1 for feedback and clear the acc

;RDA 7839,0.28183829312644537 ;read tap6 at .28
RDA 932,0.5 ;read tap1 at 0.5
RDA 2812,0.3981071705534972 ;read tap3 at .39
RDA 6571,0.22387211385683395 ;read tap 5 at 0.22
WRAX REG2,0.0000000000 ;write to reg2


RDA 1559,0.31622776601683794 ;read tap2 at 0.31
RDA 4065,0.28183829312644537 ;read tap4 at 0.28
RDA 7839,0.28183829312644537 ;read tap6 at .28

WRAX REG3,0.0000000000 ;write to reg2

;------ FB In 1
RDAX REG1,1.0000000000 ;read tap 6 for feedback and keep in acc
WRAX REG0,0.0000000000 ;read actual feedback register, clear acc
;------ Output
RDAX REG2,1.0000000000 ;read all taps and keep in acc
WRAX DACL,0.0000000000 ;write to dacl and clear acc
RDAX REG3,1.0000000000 ;read all taps and keep in acc
WRAX DACR,0.0000000000 ;write to dacl and clear acc


[potul]

A quick mod to the code should be something like this:

Code: [Select]

;
; ----------------------------
;------ Input
;------ Feedback Output
;------ MN3011
RDAX REG0,0.5000000000 ;feedback input
RDAX ADCL,0.5000000000 ;adc
WRA 0,0.0
RDA 7839,1.0 ;tap 6
WRAX REG1,0.0000000000 ;feedback from tap 6
RDA 932,0.5 ;tap 1
RDA 2812,0.3981071705534972 ;tap 3
RDA 6571,0.22387211385683395 ;tap 5
WRAX REG2,0 ;ouput1
RDA 1559,0.31622776601683794 ;tap 2
RDA 4065,0.28183829312644537 ;tap 4
RDA 7839,0.28183829312644537 ;tap 6
WRAX REG3,0.0000000000 ;output2
;------ FB In 1
RDAX REG1,1.0000000000
WRAX REG0,0.0000000000
;------ Output1
RDAX REG2,1.0000000000
WRAX DACL,0.0000000000
;------ Output2
RDAX REG3,1.0000000000
WRAX DACR,0.0000000000

I haven't tried myself, but it should work. One output to each channel. Feedback from tap 6
Note that this code can be optimized if needed.

Edit: I see I crossed postings with Mick. I think we did more or less the same things to the code.

[carvindc125]

A very quick edit of the code that you might try. I haven't looked much at it but try this and see how it might work. I am more used to using SpinASM so I had to first see what SpinCad was doing so I could very much be on the wrong track. I have added remarks to the code so that it might explain. I have not tested

Code: [Select]

;
; ----------------------------
;------ Input
;------ Feedback Output
;------ MN3011
RDAX REG0,0.5000000000 ;feedback register
RDAX ADCL,0.5000000000 ;read input left
WRA 0,0.0 ;write to head of delay

RDA 7839,1.0 ;read tap6
WRAX REG1,0.0000000000 ;write to reg1 for feedback and clear the acc

;RDA 7839,0.28183829312644537 ;read tap6 at .28
RDA 932,0.5 ;read tap1 at 0.5
RDA 2812,0.3981071705534972 ;read tap3 at .39
RDA 6571,0.22387211385683395 ;read tap 5 at 0.22
WRAX REG2,0.0000000000 ;write to reg2


RDA 1559,0.31622776601683794 ;read tap2 at 0.31
RDA 4065,0.28183829312644537 ;read tap4 at 0.28
RDA 7839,0.28183829312644537 ;read tap6 at .28

WRAX REG3,0.0000000000 ;write to reg2

;------ FB In 1
RDAX REG1,1.0000000000 ;read tap 6 for feedback and keep in acc
WRAX REG0,0.0000000000 ;read actual feedback register, clear acc
;------ Output
RDAX REG2,1.0000000000 ;read all taps and keep in acc
WRAX DACL,0.0000000000 ;write to dacl and clear acc
RDAX REG3,1.0000000000 ;read all taps and keep in acc
WRAX DACR,0.0000000000 ;write to dacl and clear acc


A quick mod to the code should be something like this:

Code: [Select]

;
; ----------------------------
;------ Input
;------ Feedback Output
;------ MN3011
RDAX REG0,0.5000000000 ;feedback input
RDAX ADCL,0.5000000000 ;adc
WRA 0,0.0
RDA 7839,1.0 ;tap 6
WRAX REG1,0.0000000000 ;feedback from tap 6
RDA 932,0.5 ;tap 1
RDA 2812,0.3981071705534972 ;tap 3
RDA 6571,0.22387211385683395 ;tap 5
WRAX REG2,0 ;ouput1
RDA 1559,0.31622776601683794 ;tap 2
RDA 4065,0.28183829312644537 ;tap 4
RDA 7839,0.28183829312644537 ;tap 6
WRAX REG3,0.0000000000 ;output2
;------ FB In 1
RDAX REG1,1.0000000000
WRAX REG0,0.0000000000
;------ Output1
RDAX REG2,1.0000000000
WRAX DACL,0.0000000000
;------ Output2
RDAX REG3,1.0000000000
WRAX DACR,0.0000000000

I haven't tried myself, but it should work. One output to each channel. Feedback from tap 6
Note that this code can be optimized if needed.

Edit: I see I crossed postings with Mick. I think we did more or less the same things to the code.

Thanks guys!
After a quick look at the schematic it appears in the X100 all 6 taps are feeding back into the input. However I havent had a chance to try the edits you have made above so im not sure exactly how much of a difference it will make.

[carvindc125]

A quick mod to the code should be something like this:

Code: [Select]

;
; ----------------------------
;------ Input
;------ Feedback Output
;------ MN3011
RDAX REG0,0.5000000000 ;feedback input
RDAX ADCL,0.5000000000 ;adc
WRA 0,0.0
RDA 7839,1.0 ;tap 6
WRAX REG1,0.0000000000 ;feedback from tap 6
RDA 932,0.5 ;tap 1
RDA 2812,0.3981071705534972 ;tap 3
RDA 6571,0.22387211385683395 ;tap 5
WRAX REG2,0 ;ouput1
RDA 1559,0.31622776601683794 ;tap 2
RDA 4065,0.28183829312644537 ;tap 4
RDA 7839,0.28183829312644537 ;tap 6
WRAX REG3,0.0000000000 ;output2
;------ FB In 1
RDAX REG1,1.0000000000
WRAX REG0,0.0000000000
;------ Output1
RDAX REG2,1.0000000000
WRAX DACL,0.0000000000
;------ Output2
RDAX REG3,1.0000000000
WRAX DACR,0.0000000000

I haven't tried myself, but it should work. One output to each channel. Feedback from tap 6
Note that this code can be optimized if needed.

Edit: I see I crossed postings with Mick. I think we did more or less the same things to the code.

Could you make a version of this with all 6 taps in feedback?
I'll try all three of the codes as soon as I can. Thanks!
And agreed you guys essentially are on the same page.

[Ice-9]

for reverb it makes more sense to have all 6 taps in the feedback loop.

[Ice-9]

Added all taps to feedback but you will have to adjust each level of the taps (easy to do) to suit what you think will work. I do suggest trying the first edits first so you know how progress goes. I have not tried any of the code in real Fv-1 so have no idea how it sounds.

Code: [Select]


;
; ----------------------------
;------ Input
;------ Feedback Output
;------ MN3011
RDAX REG0,0.5000000000 ;feedback register
RDAX ADCL,0.5000000000 ;read input left
WRA 0,0.0 ;write to head of delay

RDA 932,0.5 ;read tap1 at 0.5
RDA 2812,0.3981071705534972 ;read tap3 at .39
RDA 6571,0.22387211385683395 ;read tap 5 at 0.22
RDA 1559,0.31622776601683794 ;read tap2 at 0.31
RDA 4065,0.28183829312644537 ;read tap4 at 0.28
RDA 7839,0.28183829312644537 ;read tap6 at .28

WRAX REG1,0.0000000000 ;write to reg1 for feedback and clear the acc

RDA 932,0.5 ;read tap1 at 0.5
RDA 2812,0.3981071705534972 ;read tap3 at .39
RDA 6571,0.22387211385683395 ;read tap 5 at 0.22
WRAX REG2,0.0000000000 ;write to reg2


RDA 1559,0.31622776601683794 ;read tap2 at 0.31
RDA 4065,0.28183829312644537 ;read tap4 at 0.28
RDA 7839,0.28183829312644537 ;read tap6 at .28

WRAX REG3,0.0000000000 ;write to reg2

;------ FB In 1
RDAX REG1,1.0000000000 ;read tap 6 for feedback and keep in acc
WRAX REG0,0.0000000000 ;read actual feedback register, clear acc
;------ Output
RDAX REG2,1.0000000000 ;read all taps and keep in acc
WRAX DACL,0.0000000000 ;write to dacl and clear acc
RDAX REG3,1.0000000000 ;read all taps and keep in acc
WRAX DACL,0.0000000000 ;write to dacl and clear acc


[ElectricDruid]

So far no-one has mentioned the extra MN3007 on the right side. That needs taking into account too. It's only a question of making the buffer slightly longer and sticking another RDA in. Essentially the X100 uses a MN3011 with an extra tap added.

[carvindc125]

So far no-one has mentioned the extra MN3007 on the right side. That needs taking into account too. It's only a question of making the buffer slightly longer and sticking another RDA in. Essentially the X100 uses a MN3011 with an extra tap added.

I knew about that but I didnt realize you could do anything about it on the MN3011 block. Essentially the mn3007 is add one more tap.
It all looks like this when put together

Right
Tap1 20ms
Tap 3 60ms
Tap 5 140ms
(Tap 7 190ms (MN3007)

Left
Tap 2 33ms
Tap 4 86ms
tap6 166ms

So you say that can easily be done all in the one MN3011 block?

[carvindc125]

So far no-one has mentioned the extra MN3007 on the right side. That needs taking into account too. It's only a question of making the buffer slightly longer and sticking another RDA in. Essentially the X100 uses a MN3011 with an extra tap added.

Would one of you guys mind editing the code one more time to reflect this?
The mn3007 is adding a "7th" tap to the right side only and it is adding 34ms delay after tap 6 which makes the 7th tap 190ms and it is also in feedback with the other 6
So taps 1,3,5,7 are one output and taps 2,4,6 are the other output.

Right Output
Tap1 20ms
Tap 3 60ms
Tap 5 140ms
Tap 7 190ms

Left Output
Tap 2 33ms
Tap 4 86ms
tap6 166ms

[potul]

You only need to add a couple of read instructions further on the RAM space.
Here you have it, I haven't tried it, so you will need to test.

Code: [Select]

;
; ----------------------------
;------ Input
;------ Feedback Output
;------ MN3011
RDAX REG0,0.5000000000 ;feedback register
RDAX ADCL,0.5000000000 ;read input left
WRA 0,0.0 ;write to head of delay

RDA 932,0.5 ;read tap1 at 0.5
RDA 2812,0.3981071705534972 ;read tap3 at .39
RDA 6571,0.22387211385683395 ;read tap 5 at 0.22
RDA 1559,0.31622776601683794 ;read tap2 at 0.31
RDA 4065,0.28183829312644537 ;read tap4 at 0.28
RDA 7839,0.28183829312644537 ;read tap6 at .28
RDA 8972,0.28183829312644537 ;read tap7 at .28

WRAX REG1,0.0000000000 ;write to reg1 for feedback and clear the acc

RDA 932,0.5 ;read tap1 at 0.5
RDA 2812,0.3981071705534972 ;read tap3 at .39
RDA 6571,0.22387211385683395 ;read tap 5 at 0.22
RDA 8972,0.28183829312644537 ;read tap7 at .28
WRAX REG2,0.0000000000 ;write to reg2


RDA 1559,0.31622776601683794 ;read tap2 at 0.31
RDA 4065,0.28183829312644537 ;read tap4 at 0.28
RDA 7839,0.28183829312644537 ;read tap6 at .28

WRAX REG3,0.0000000000 ;write to reg2

;------ FB In 1
RDAX REG1,1.0000000000 ;read tap 6 for feedback and keep in acc
WRAX REG0,0.0000000000 ;read actual feedback register, clear acc
;------ Output
RDAX REG2,1.0000000000 ;read all taps and keep in acc
WRAX DACR,0.0000000000 ;write to dacR and clear acc
RDAX REG3,1.0000000000 ;read all taps and keep in acc
WRAX DACL,0.0000000000 ;write to dacl and clear acc
The only concern I have is that the memory used doesn't match with the ms of delay you posted (at the standard sampling freq). The spincad version seems to have a longer delay. It's easy to adjust, you just need to calculate the memory locations for each tap based on the sampling frequency and modify each RDA instruction.

[Ice-9]

Yeah Mateu, I thought the same about the tap delay timings but as you say not difficult to work out at the fs used to clock the FV-1.

[Ice-9]

I was just looking at the schematic for the Rockman X100 around the MN3011 and MN3007 BBD's used for the reverb as I was wondering about the delay tap timings that 'carvindc125' posted, the timings for each tap are from the MN3011 Datasheet stated as the maximum for each of the 6 taps.
This suggests that the clock rate is 10kHz. I have not looked at the clock oscillator of the X100 yet myself so does anyone know if it is running at 10kHz.

With the MN3011 coded into FV-1 it will be easy to add a pot control to change the delay timing to suit the min/max available delay even though the X100 is set an adjustable delay may be worth adding.
also regarding the MN3007 delay it looks like the input is fed from the MN3011 tap 6 output, I also don't notice any feedback circuit.

Can anyone confirm any of this before I look into the coding a bit deeper?

[carvindc125]

Sure give me a sec and i'll answer all this

[carvindc125]

I was just looking at the schematic for the Rockman X100 around the MN3011 and MN3007 BBD's used for the reverb as I was wondering about the delay tap timings that 'carvindc125' posted, the timings for each tap are from the MN3011 Datasheet stated as the maximum for each of the 6 taps.
This suggests that the clock rate is 10kHz. I have not looked at the clock oscillator of the X100 yet myself so does anyone know if it is running at 10kHz.

With the MN3011 coded into FV-1 it will be easy to add a pot control to change the delay timing to suit the min/max available delay even though the X100 is set an adjustable delay may be worth adding.
also regarding the MN3007 delay it looks like the input is fed from the MN3011 tap 6 output, I also don't notice any feedback circuit.

Can anyone confirm any of this before I look into the coding a bit deeper?

Here are the feedback networks pointed out



The frequency is in fact set at 10 kHz The circuit was basically pulled directly from the data sheet.
Yes a pot could be added to change delay times/frequency. That is actually a common mod for the X100 and was implemented in the Nobels Sound Studio (Clone of the Rockman)

[ElectricDruid]

The schematic I've got for the Rockman ("X100 IIB Ultralight") gives R1=22K, R2=110K, C=220p for the MN3101. That gives (according to my back-of-envelope calculations) about 11.5KHz, so the 10KHz figures aren't far off. I can't find an actual clock freq equation in the datasheet, but there are some guide figures, so I had to extrapolate - always risky!

We should be able to get an idea by looking at the filter cutoffs too. You'd want to be down <4KHz for a clock like that.

[Vivek]

I extrapolated clock speed of ~8.5 Khz roughly for R1=22K, R2=110K, C=220p for the MN3101

little Red dot on the graph, visible when you zoom in

This means that first parameter of RDA statement should be tap point on MN3011 multiplied by maybe about ~1.93

Tap at 396 on MN3011 will become RDA at ~ 763 on FV-1, and so on

That 1.93 multiplier could even be 1.65 based on how you extrapolate the clock graph, component tolerances etc, but I feel any multiplier from 1.65 to 1.93 will substantially sound fairly the same in this application.

[carvindc125]

The schematic I've got for the Rockman ("X100 IIB Ultralight") gives R1=22K, R2=110K, C=220p for the MN3101. That gives (according to my back-of-envelope calculations) about 11.5KHz, so the 10KHz figures aren't far off. I can't find an actual clock freq equation in the datasheet, but there are some guide figures, so I had to extrapolate - always risky!

We should be able to get an idea by looking at the filter cutoffs too. You'd want to be down <4KHz for a clock like that.

I extrapolated clock speed of ~8.5 Khz roughly for R1=22K, R2=110K, C=220p for the MN3101

little Red dot on the graph, visible when you zoom in

This means that first parameter of RDA statement should be tap point on MN3011 multiplied by maybe about ~1.93

Tap at 396 on MN3011 will become RDA at ~ 763 on FV-1, and so on

That 1.93 multiplier could even be 1.65 based on how you extrapolate the clock graph, component tolerances etc, but I feel any multiplier from 1.65 to 1.93 will substantially sound fairly the same in this application.

The 120K resistor is actually a 110K resistor on the PCB itself.
Everything else the same as schematic on the MN3101. Not sure how much that changes things.

[Digital Larry]

The only concern I have is that the memory used doesn't match with the ms of delay you posted (at the standard sampling freq). The spincad version seems to have a longer delay. It's easy to adjust, you just need to calculate the memory locations for each tap based on the sampling frequency and modify each RDA instruction.

At the time I came up with the MN3011 block, I thought that the relative spacing of the taps was in line with that chip.  By default all delays drop into SpinCAD allocating all the delay RAM, so to get a real MN3011 you'd adjust the max delay to "whatever it is".  Also keep in mind that that's all this is, and there is no aliasing or lowpassing or noise injection or anything.  It's an idealized digital version of an MN3011 with up to 1000 msec of delay at full bandwidth.  And it's mono-out only.

Are you guys saying that the taps are in the wrong proportion?  Sorry I didn't go through all the calculations.

The other point worth mentioning here is that indeed, a multi-tap delay is one of the simplest things you can implement in Spin ASM, so it's a useful exercise in any case.  I'm pretty sure the SpinCAD implementation looks relatively bizarre due to its need to be pot-scalable and relocatable.