The FV-1 ramp envelope

[handegar]

I am currently working on an FV-1 emulator written in GOLang and I am a bit confused on how the RAMP oscillator works on the actual hardware.
Reading the doc it would seem like the RAMP oscillator should generate a standard saw-tooth where the program controls the frequency (rate) and the amplitude (512, 1024, 2048 or 4096).

However the following program does not generate what one would expect when sampling an actual FV-1;

Code Select Expand


SKP    RUN, start
; Initialize ramp LFO0/1 for 5Hz and +/- 0
WLDR   RMP0, 0, 4096
WLDR   RMP1, 0, 4096
; End of skip/initiaization

; Main program code
; First, read in POT0 and write it to LFO0_RANGE
; POT0 -> ACC
start:
LDAX    POT0
; Write it to LFO0/1 amplitude register and clear ACC
WRAX    RMP0_RANGE, 1.0
WRAX    RMP1_RANGE, 0
; Read in POT1 and multiply it by 0.7338, POT1 * 0.7338 -> ACC
RDAX    POT1, 0.7338
; Add 0.2446 to the value in the accumulator
SOF     1.0, 0.2446
; Write it to the LFO0/1 frequency register and clear ACC
WRAX    RMP0_RATE, 1.0
WRAX    RMP1_RATE, 0

; We now use the CHO RDAL instruction which will read an LFO into the accumulator
CHO     RDAL, RMP0

; Wave is now in ACC, write it to DACL
WRAX    DACL, 0

  ; Read RAMP-1 
;; CHO     RDAL, RMP1

; Wave is now in ACC, write it to DACL
WRAX    DACR, 0


The program is taken from the AN-0001 document from SpinSemi.

Sampling the output generated gives the following (the "DACL" output):



The first section is all pots at zero and the second section is all pots at max.

It seems to me that the slope of the envelope is more or less the same for both envelopes. The first envelope is not symetric either. Is this correct or is this the wrong way to try to figure out how the FV-1 ramp envelopes look? Maybe there is some kind of lowpass/highpass filtering going on messing up the waveform?

[Digital Larry]

That's certainly odd.  If you haven't already, I'd suggest asking over at the Spin Forum.

DL

[octfrank]

About what I would expect. The DAC output is designed for audio range and you are making signals in sub-audio range, they will look bad. Better test would be to apply the ramp as the amplitude of a 1KHz carrier.

[handegar]

About what I would expect. The DAC output is designed for audio range and you are making signals in sub-audio range, they will look bad. Better test would be to apply the ramp as the amplitude of a 1KHz carrier.

That makes sense. Thanks!

[potul]

I am currently working on an FV-1 emulator written in GOLang ...

A potentially useful resource could be the java library Larry used for FV-1 emulation in SpinCAD. I don't recall the name of it...

[handegar]

I am currently working on an FV-1 emulator written in GOLang ...

A potentially useful resource could be the java library Larry used for FV-1 emulation in SpinCAD. I don't recall the name of it...

Yes, I have looked at both the ElmGen and the vcvrack-fv1-emu projects whenever I am stuck or confused. But now I wanted to see how close I can get to the actual hardware