Might post for help. Can some explain, if correct, how the last stage works?
I understand Q2 but don't understand Q1 onwards. Is Q1 an emitter follower thrown into the more common final stage of the BMP stage to act as a buffer? 
Yes, the purpose is to lower the output impedance.
Is the first stage also a modified Dallas Rangemaster with a Sziklai pair? It looks kind of similar and according to the tests I would imagine it behaves in such a way.
No....simply because the "Dallas Rangemaster" is not an invention by itself.
The "Dallas Rangemaster" is a standard Mullard (and others) textbook transistor amplifier circuit with different (smaller) coupling capacitors. So the question has to be: " Is the first stage a modified amplifier circuit with a Sziklai pair ?" and then the answer is: yes
I managed to make a sim of the circuit in LTspice. I'm using 2N3904s and a 2N3906 to model it and it was my first attempt at biasing. I kept the "bypass capacitor" for the emitter of the pair but set it low. Not sure how necessary it would be with silicon transistors anyway.
There is no difference between germanium and silicon transistors concerning the bypass capacitor. As the name says this capacitor bypasses the emitter resistor (for AC-signals) thus increaing the AC-gain of this stage. otherwise the maximum gain would be determined by the relation of the collector to the emitter resistor. If this capacitor is too low, then the AC-gain for low frequencies will drop.