Expanding Boss DD-2 Delay Time with 256k DRAM

[aviherman5]

Hi all,

I just replaced my DD2's DRAM with 256k of the same series of DRAM thinking that I should get 12x the delay time.

The pedal works completely normally, but has no noticeable longer delays

Could anyone shed some light as to why this didn't work/how to make it work?

Thank you!

[anotherjim]

Without looking too much further, I'd say it doesn't have enough address pins for larger memory. As the DRAM memory control is handled by the microcontroller, there probably isn't anything you can do

[aviherman5]

I should add the SDE-3000 uses the same controller and uses a whole bunch of 64k ram to get 4.5 secs

Here is the manual: https://www.synthxl.com/wp-content/uploads/2019/07/Roland-SDE-3000-service-notes.pdf

Does that add anything to the foray 

[ElectricDruid]

Checking the two schematics side by side (here's the DD2) I can only see the same 3 x 4164 chips in both units. If the SDE3000 goes much longer, I'd guess it can drop the sample rate to a much lower frequency. Are there any other Boss/Roland units that use this chip for longer times?



There's eight pins used for the address input, with Row and Column selects to set up a full sixteen bit address.
Then there are three chip selects. So you can put three larger chips in it, but then you only use a quarter of each one. Unless you could persuade IC7 the main controller (custom CMOS gate array chip) to produce more addresses or chip selects, there's no way I can see.

[anotherjim]

How have you added the extra RAM? I see no RAM board on the DD2 while the SDE3000 has another 12 of the 4164 DRAM for the delay on a separate board. The controller is a programmable gate array it may have the same part number but it appears to be working differently. Your DD2 only shows x3 64k RAM chips and these probably represent the S, M & L delay sizes using one or two or three of them. The 3000 seems to use the same x3 4164 for a different purpose to do with data compression.

[ElectricDruid]

RAM Board?!? How did I miss that? Doh! 

Still, that just makes it worse. The SDE300 has a processor and *two* gate arrays in it, and we don't even know if they're programmed the same way.

[anotherjim]

It's weird how the RAM chips are organised too. Not in byte or nibble parallel data config. There must serial/parallel shift register action in the controller. The DD-2 could even be single bitsteam operation! They've probably done something to make the refresh cycle coincide with delay addressing so it doesn't need a separate refresh controller so all the DRAMs are always active.

[Slowpoke101]

This could be a wonderful way to ruin a working classic Boss DD-2 Delay pedal. Now you've replaced the 4164s with 41256s which unfortunately will not work as the gate-array chip cannot fully address a 256K DRAM chip. Pin 1 of a 41256 chip is address line A8 and the gate array chip cannot generate this. But the Roland SDE-3000 uses a curious method of getting around this and using 4164 memory chips which were also cheaper at the time (and, most likely, available). This method is known as "stacking". Three other memory chips are soldered on top of the original chip (or arranged side by side on a PCB as in the SDE-3000)  and soldered pin to pin. With the exception of the CAS (Pin 15) and RAS (Pin 4). The CAS lines in each single stack are connected together in that stack and only that stack. This is repeated for the next stack and so on. The gate array has the pins on it assigned to CAS addressing - 50, 51 and 52. Each of these connects to one CAS stack connection.
The RAS connections are a bit more fiddly and need to be connected as the stacks are built. The gate array has pins 33, 34, 35 and 36 assigned to RAS addressing and all those pins are used. Fortunately pin 33 is already in use on the DD-2 circuit board so there is no need to worry about that. The first layer of memory in the stack will need to have their RAS pins (pin 4) connected together with a thin insulated wire and then that wire connected to pin 34 of the gate array. Then the next stack soldered on (all RAS pins connected) and a wire connected to pin 35 of the gate array. And then the last of the stack (all RAS wires connected) and the last wire connects to pin 36. Now you check for shorts and other possible errors.
Keep in mind that it may not work or there may be other problems. The case may not fit. It is also a lot of work and it is also not easy to do. Good luck if you try.

Jim, you were quite correct, the gate array cannot address a 41256 DRAM.
Tom, don't worry, I didn't pick up on the other array either. RAM stacking may have brought back memories of playing with Sinclair Spectrums.

[ElectricDruid]

It's weird how the RAM chips are organised too. Not in byte or nibble parallel data config. There must serial/parallel shift register action in the controller. The DD-2 could even be single bitsteam operation! They've probably done something to make the refresh cycle coincide with delay addressing so it doesn't need a separate refresh controller so all the DRAMs are always active.

Yes, a single bitstream would be my guess too. The RAMs themselves are 1-bit devices, so you just string lots of them together and shuffle bits in and out - as opposed to the fairly-typical home computer RAM arrangement, where you'd see a group of eight of those chips with all the addressing paralleled to make a byte-width memory.

That SDE3000 schematic is a nightmare. Trying to fix one of those would be an entire course in early-digital techniques and Roland-level hacking. The DD2 looks simple alongside it, which it's definitely not, lol.

[aviherman5]

Wow! Thanks for all the replies!

Slowpoke101, based on what you said, hypothetically can I connect the 12 4164s to the DD2 as seen below? That would make the delay time ~4secs - could I use 41256s to make it ~16  ?


p.s. note the CAS and RAS connections, I think they are the crucial ones to make this work.

[Slowpoke101]

Unfortunately you can't use the 41256s to get 16 seconds because the delay's gate array doesn't generate the A8 address line. Which you can't really do anything about because all the timing systems are within the chip itself.

Looking at your diagram, it looks as if you have got the idea. Just remember that pin 14 of the 4164s go to the RAM1, 2 and 3 pins of the gate array. They are not connected together as like pin 2 is. This separation of the RAMs' data in and out lines allows for the delay to write to a memory location and read it simultaneously. Why? No idea. I suspect that it is something to do with the DRAM refresh cycle. It's a clunky way to do it but it would work but if it also used the refresh clock as the delay read address generator then it makes more sense. It would be a seamless delay, no start / stop clicks.
Anyway, good luck and make sure that you buy working DRAM chips also keep an eye on the current demands that the additional chips will want. Let us know how you go.

[aviherman5]

Thanks so much, so glad I’ve gotten the idea!

Shame about the 256kbs, but oh well

Looking forward to maybe making an external RAM board just for fun - will of course let you know how it goes!

[FSFX]

Yes, a single bitstream would be my guess too. The RAMs themselves are 1-bit devices,

Using one bit wide memory is all that is needed for the memory of a delay that uses Delta-Sigma modulation type of 1-bit analogue to digital convertion, just like the very common PT2399 delay chip does.

[anotherjim]

On the DD-1 scheme, it looks to me that we have a resistor R73 pack forming a 12-bit R/2R DAC with IC4 a 4066 switch providing sample & hold for input and output. There is some fancy footwork going on here to interleave 12bit SAR and DAC.

The DD-1 also has an interesting adjustable VCO clock for delay time. Common components around IC8. Worth copying.

[Slowpoke101]

The SDE-1000/3000 manual goes into how the A/D to D/A conversion and memory interfacing actually works. It is quite interesting and quite frankly astonishing that Boss (Roland) used this in the DD-2 pedal (and others). The 63H101 gate array IC is a very sophisticated device. The block and timing diagrams give some insight into this remarkable device. I really have to get one of these pedals.

[Nitefly182]

The SDE-1000/3000 manual goes into how the A/D to D/A conversion and memory interfacing actually works. It is quite interesting and quite frankly astonishing that Boss (Roland) used this in the DD-2 pedal (and others). The 63H101 gate array IC is a very sophisticated device. The block and timing diagrams give some insight into this remarkable device. I really have to get one of these pedals.

A little context here just because we think of Boss pedals as inexpensive nowadays but their first-in-class products like the DD2 and RV2 were extremely expensive. Here's a picture of a DD2 box with original price tags. Inflation adjusted retail price is over $750 and the street price is about $480.

[aviherman5]

Wowwwwww

[FSFX]

The SDE-1000/3000 manual goes into how the A/D to D/A conversion and memory interfacing actually works.

It is very interesting that they went to the trouble of implementing a 12bit ADC/DAC solution with that chip and stored each sample as four successive tri-bits across three memory chips.

[aviherman5]

While we're on the subject I'll throw this into the mix.

The RDD-10 uses the same chip as we've discussed and gets 1.5ms to 400ms using this switching


The DD-2 uses the switch scheme as seen above and the SDE uses a COMPLETLEY whackado scheme. Take a look at the controller's DB pins to see what I mean (54-61).

On top of the whole RAM thing, I think the delay switching also needs to be adjusted. The RDD-10 uses the most readable schematic to me and manages to get 400ms, so is anyone able to logically deduce how to squeeze more out of it?

The SDE-3000 datasheet is pretty lacking in its description of the pins purpose, so it as simple as making combinations of giving +5V_dc to the pins or is it something much more complicated.

Would appreciate any insight you guys have.

Thanks so much!

[Slowpoke101]

I think that you will find that the RDD-10 range select isn't completely wackado when you think about it. It allows a very good selection of various timing ranges when combined with the delay time control. I would suggest you think about copying it. The DD-2's VCO has a very wide range so when combined with an expanded memory, you may get up to the delay period that you are hoping for.  The LONG mode with the delay time control at maximum will probably get to the 4.5 seconds. If it doesn't, it may require mods to the VCO but slowing that too far may cause the recorded audio to become grated (harsh) as the sample rate falls too far.

As a previous poster has indicated, these pedals are valuable - even second hand they still hold their value. Are you certain you want to modify your pedal to this extreme.