Removing the 4.5v buffer

[soggybag]

I'd like to remove the 4.5v buffer and use it as a mixer. My thought is is that for mos cases I should be able to remove IC2B and connect VB to the junction of R29 and R30.

In this case I suspect it is not possible because of the DC path through R7, R8, RES, and R9. Is that correct? Is there any way around this? Should I just did another op-amp or transistor to buffer the mixer?

[antonis]

It strictly depends on bias current drawn by IC1..

Taking 5μA per input as typical and making R29 & R30 10k, you'll have a VB off-set of about 100mV..
Of course, if you can afford higher current consumption, make them 1k and don't bother anymore..
(Divider current should be about 500 times higher than bias current..)

[soggybag]

Help me understand this Atonis. When I look at this I think of the voltage. As in I need 4.5v to bias IC2A, C, and D.

But you are looking at this in term of current. Obviously my beginner perspective is missing something fundamental.

I'm not sure what is happening with R7, 8, and 9 something to do with the filter feedback.

[antonis]

When I look at this I think of the voltage.

Convenient only when voltage divider load is much higher than divider equivalent resistance..
e.g. 10k/10k divider feeds 100k or bigger load..

But you are looking at this in term of current.

That's because of resistive voltage divider "limited" current capability, compared to IC2B output one..
IC2B output impedance is considered almost zero, hence output voltage is considered almost constant, unrelated of current..

http://www.geofex.com/circuits/biasnet.htm

P.S.
A little homework: 

[ElectricDruid]

I'm not sure what is happening with R7, 8, and 9 something to do with the filter feedback.

The filter is a classic OTA State Variable Filter (SVF).

R7 is part of a group with R6, R11, and R12. R6 and R11 form voltage dividers with R5 and R10 to limit the input level to something the OTA can cope with (10s of mVs, typically). R7 does the same for the feedback signals. R12 is there just to balance the offsets as much as possible.

R9 is a pair with R13. Both hang off the output darlington down to ground. The output from an OTA is a current, but by taking that current to ground through a resistor, a voltage is developed across that resistor which we can then use (picked off by R10, C6 and R14). It's the cheapest possible I-to-V convertor.

R8+Res pot control the amount of bandpass feedback. This is usually inverted w.r.t the input, so it acts to *damp* any oscillation. As such, you get most resonance with the highest value - not what you'd expect where you get more resonance by letting more signal through. The actual resonance itself is created by the other feedback path from the second stage, through R14. This is the lowpass feedback and is in-phase with the input, so causes the circuit to resonate/ring/perhaps oscillate.

I first built one of these LM13700 SVF circuits when Maplin published their "Autowah" circuit back in the day!

[GibsonGM]

Help me understand this Atonis. When I look at this I think of the voltage. As in I need 4.5v to bias IC2A, C, and D.

But you are looking at this in term of current. Obviously my beginner perspective is missing something fundamental.

Any time you draw current from a divider - among other power sources; transformers and batteries exhibit this too in similar ways - the available voltage will drop.  That is why Antonis says we want 500x the current in the divider as that which is taken from it. Just a rule of thumb, easy peasy. Making the current there 'stiff' will lessen the amount that it drops, the 'offset' (here, 100mV).   

Now look at Antonis' "homework", go thru the problems B and C...note what happens to I3, the current thru the load resistor R3, increases as R3 decreases in value and draws more current from the network...

[soggybag]

When I look at this I think of the voltage.

Convenient only when voltage divider load is much higher than divider equivalent resistance..
e.g. 10k/10k divider feeds 100k or bigger load..

But you are looking at this in term of current.

That's because of resistive voltage divider "limited" current capability, compared to IC2B output one..
IC2B output impedance is considered almost zero, hence output voltage is considered almost constant, unrelated of current..

http://www.geofex.com/circuits/biasnet.htm

P.S.
A little homework: 

Homework!

(B) R3 = 10M Vb = ~4.5v (10M is too large to affect R1, R2 divider)
(C) R3 = 10k Vb = ~3.3v (10k in parallel with 10k = 5k)

[Rob Strand]

Homework!

(B) R3 = 10M Vb = ~4.5v (10M is too large to affect R1, R2 divider)
(C) R3 = 10k Vb = ~3.3v (10k in parallel with 10k = 5k)

But if the left end of R3 is actually being bias at Vb, what happens then?

The voltage at each end of R3 is the same.
=> The voltage across R3 is zero.
=> The current through R3 is zero.
=> The current through R7 in the original ckt is zero.
=> There is no DC current through R7 to affect VB!

[soggybag]

I see a DC path from VB through R7, R8, RES, and R9 to ground. There is another from VB R11, R10, and R9 to ground. When I see this I think these resistors are in parallel with R30 and would affect the VB voltage divider, if the buffer IC2B was removed. Is that correct or am I missing something? Am I reading this correctly?

[PRR]

The two 330r at the OTA inputs sure need a LOW impedance point or they will back-talk into each other. Is that bad or good? Is 100nFd low-Z enough? (probably not!) Is it just easier to provide an opamp buffer than to do worst-case analysis?

[Rob Strand]

I see a DC path from VB through R7, R8, RES, and R9 to ground. There is another from VB R11, R10, and R9 to ground. When I see this I think these resistors are in parallel with R30 and would affect the VB voltage divider, if the buffer IC2B was removed. Is that correct or am I missing something? Am I reading this correctly?

There is a DC connection but that's not the issue.  The question is what effect does the DC connection have?

Here's a simpler set-up with an opamp.  You can see VR is not shifted from Vcc/2.

[Elektrojänis]

Many of you in this thread still seem to miss the R9. Easiest spot to see it is R11->R10->R9. In series those are bit under 12kohm. If you connect that to a passive voltage divider made out of two 47kohm resistors, the divider voltage will drop quite a lot. And there is another path to R9 through F7, R8 and RES.

The DC connection between the OTA's is probably not a problem, but there is a DC connection to ground from the bias supply that has a lower impedance than the resistors in the voltage divider.

[antonis]

Many of you in this thread still seem to miss the R9.

R9/R10 node sits at whatever voltage occurs when fed with current from Darlington buffer output..

[Rob Strand]

Many of you in this thread still seem to miss the R9. Easiest spot to see it is R11->R10->R9. In series those are bit under 12kohm. If you connect that to a passive voltage divider made out of two 47kohm resistors, the divider voltage will drop quite a lot. And there is another path to R9 through F7, R8 and RES.

The DC connection between the OTA's is probably not a problem, but there is a DC connection to ground from the bias supply that has a lower impedance than the resistors in the voltage divider.

The point where R9 connects to the emitter should be at VB.   There is DC current down R9 to ground but no (very small) current down R8, R10.

[Elektrojänis]

R9/R10 node sits at whatever voltage occurs when fed with current from Darlington buffer output..

The point where R9 connects to the emitter should be at VB.   There is DC current down R9 to ground but no (very small) current down R8, R10.

Doh! It was me who was missing something! (But maybe Soggybag was missing that one too...)

[Rob Strand]

Doh! It was me who was missing something! (But maybe Soggybag was missing that one too...)

It's good people are thinking about it.   The details of this stuff can be overwhelming.  (I still question my own thoughts when people post stuff.)

I haven't checked the schematic overall but it would be nice if the schematic showed the internal connection of the collectors of the OTA buffers connecting to +VA.

Also not checked is a variant of the above ckt with no Vref buffer,

[soggybag]

Doh! It was me who was missing something! (But maybe Soggybag was missing that one too...)

It's good people are thinking about it.   The details of this stuff can be overwhelming.  (I still question my own thoughts when people post stuff.)

I haven't checked the schematic overall but it would be nice if the schematic showed the internal connection of the collectors of the OTA buffers connecting to +VA.

Also not checked is a variant of the above ckt with no Vref buffer,

Thanks for posting this Rob. It proving that my suspicions were correct that it would be possible to remove that op-amp VB. I need an op-amp to build mixer on the end of this, or at least that's the goal.

[Rob Strand]

Thanks for posting this Rob. It proving that my suspicions were correct that it would be possible to remove that op-amp VB. I need an op-amp to build mixer on the end of this, or at least that's the goal.

From an *AC* perspective you might think about making the Vref resistors 4.7k or 10k the changing the Vref cap to 100uF.  Easy changes which offer some safeguards without pondering the circuit too much.

[merlinb]

I suspect it would work if you connect R7 to ground through a big cap instead of to Vref. Everything else can get Vref from the Vref divider.