Adventures with the DS-1

[FleshOnGear]

[ElectricDruid]

Wow! It's a beast!

A few comments:

1) It's hard to read with all those lines going along the bottom. I can't easily tell what's what without having to trace a line all the way back to the other end of the schematic. You don't have to connect all the "GND" points together - that's what the GND symbols do! Just connect a GND wherever you need one. Similarly with the "VA" bias supply.
Oh, and two of those wires traipsing all the way across the schematic go to SW1A, when both SW1B and SW1C are down the other end. Couldn't you move it so it's with its friends?

2) That tone control looks weird. There's a RC network hanging off the wiper and going back to the input? Of course, there's a lot of weird tone control netowrks in the world, so maybe...but it screams "triple check!" at me.

HTH

[PRR]

Why is Zener D9 hanging on a signal point? Oh, if it had been noted "20V" I'd overlook it, but there's a lot of stuff not making sense to me. Like a 4.7Meg far right which is really on the input tip far left.

[FleshOnGear]

Thanks for the comments. The schematic admittedly is a mess. It was never meant for public consumption. One day I'll clean it up. It's certainly not great practice, for instance, to place an input resistor symbol by the output. The pcb layout is not like that. 


D9 is a Schottky diode, not a Zener, and it's there to keep the signal from going far below the ground rail, in case the op amp is one that doesn't like such things. I didn't think it was necessary to do that on the buffer half of the IC because it's DC coupled to the transistor booster.

The extra cap and resistor on the tone control is just a little bit of a treble bleed at a higher frequency than the normal high pass leg of the tone control. I'm not sure if I like the effect it has, though. It's good on some of my amps, and not on others. It will be simple enough to remove those components.

I took this opportunity to try some things that I couldn't do modding an original, and things mostly worked as intended. For some reason, though, Eagle connected the wiper of the tone pot to the emitter of the transistor buffer, which caused some bizarre behaviors from the tone and volume controls. I will correct and try again.

[ElectricDruid]

Thanks for the comments. The schematic admittedly is a mess. It was never meant for public consumption. One day I'll clean it up. It's certainly not great practice, for instance, to place an input resistor symbol by the output. The pcb layout is not like that.

The point of tidying it up is not for public consumption, but rather that the clearer you can make the schematic, the easier it becomes for you to spot errors. If it's a tangle, you'll get lost and you'll miss stuff. And then it won't work when you make a PCB out of it and you won't know why...Oh!
I have learned this the hard way and I'm trying to save you having to do the same!

[antonis]

+1 to what said above..

You could be "forgiven" for using a single symbol/connection for closely adjacent items on schematic (like one GND for C1/C2/C8 and another one for R6/C6/R9) but individual connections are by far preferable..

[FleshOnGear]

I finished wiring up the new pcb this morning and everything works properly. I may tweak the tone control values a bit because I've always had trouble getting this style of tone control to work well with certain amps. I wanted to keep it a simple single tone knob, but because of that I will probably need to try to voice it carefully. I'll make a clip or two when I'm done.

[FleshOnGear]

I get the feeling this thread has become tiresome, and I'm sorry about that, but I have one more question regarding hissing noise. This build is not obscenely noisy, but it hisses significantly more than an actual DS-1. The circuit I built has only two major changes with respect to the DS-1. 1) The input buffer is DC coupled to the common emitter transistor boost. 2) The op amp gain stage is inverting rather than non-inverting.

The question is, will the inverting gain stage possibly create more noise than if I had used a non-inverting stage? Could I be experiencing thermal noise from the input resistor to the inverting stage? I'm suspecting this part of the circuit, because I don't see how changing the coupling between the input buffer and the transistor boost would introduce extra noise. For the transistors I used BC550's, which are supposed to be low noise - I don't suspect them, though it's possible they are slightly noisier than the transistors in the DS-1.

Anyway, sorry to drone on about this. Thanks for any insights. As it stands, I'll probably build one with a non-inverting op amp stage, because I don't have any better ideas. Take care, folks.

[antonis]

Try to short R4..

It isn't polite to add a 1M5 resistor on a BJT of about 165 Ohm Base spreading resistance..
(not to mention the significant signal amplitude attenuation due to  h_FE*R6 // R5 / (h_FE*R6 // R5 + R4) voltage dividing effect..)

[Rob Strand]

I get the feeling this thread has become tiresome, and I'm sorry about that, but I have one more question regarding hissing noise. This build is not obscenely noisy, but it hisses significantly more than an actual DS-1. The circuit I built has only two major changes with respect to the DS-1. 1) The input buffer is DC coupled to the common emitter transistor boost. 2) The op amp gain stage is inverting rather than non-inverting.

antonis is probably on the right track.

Putting large value resistors in series with the input is asking for noise.   The 470pF across the 1.5M resistor helps but it's not quite enough to prevent the noise increasing.

The loading between the various stages is quite dependent on the transistor gain.   That means different builds could sound different.

To roughly summarize the frequency response:

The 470pF cap C4 provides a step EQ with a HF boost.
It's actually an LF cut.  The LF cut is about 7dB, set by the R4 (1M5) and R5 (2M2) in parallel with the load effect of Q1 (and Q2).
The HF boost starts at 220Hz then rises up to 500Hz.

The capacitor C5 (4.7u) and resistor R8 (220R) and R10 (47R) together with Q2's emitter resistance provide another HF boost.   Roughly starting at 150Hz and then rises up 380Hz.

The combination of the two provides a doubly boosted region (second order slope) between 220Hz and 380Hz.

The point of all this is in order to get a doubly boosted region you need two RC stages.  At present your design provides that at the input with C4 etc. then again at the transistor emitter with C5 etc.   If you were to remove R4, C4 in order to improve the noise you need to move the RC network between Q1 and Q2.  However that's going to require some careful redesign to make sure nothing changes.  (The whole aim being to get the same frequency response with lower valued resistors which don't add noise like those at the input of Q1.)

The question is, will the inverting gain stage possibly create more noise than if I had used a non-inverting stage? Could I be experiencing thermal noise from the input resistor to the inverting stage?

It can but the fact you have the IC Buffer preceding the inverting stage is also a problem.  The IC buffer produces just as much noise as the gain stage.  The two noise components then add together and are then amplified by the gain stage.

You might be able to replace the IC buffer with a transistor buffer.

Without going through a lot of fine detailed noise analysis I'm speculating the input RC network is the main problem.

[Rob Strand]

Here's a comparison of three options.
Main conclusion is the input RC network is causing the noise.
While the idea is to keep the frequency response the same
that doesn't mean all options sound the same.

1) as is
2) moved RC network - simple
   The response doesn't quite match as the emitter circuit
   of the second transistor has a frequency dependent loading
   on the RC network.   You can see a loss of slope in the
   response plot.
   There is a significant reduction is noise like a factor of 10,
3) moved RC network - better response match
   Significant reduction in noise.  Even better than 2.

   I avoided making the added base resistor (68k) too small
   since it will start to screw up the biasing.
   Notice how the 4k7 emitter resistor is now 2k2.

Schematic


Response



As a conceptually simpler mod, we can scale down the input values:
R4=150k, R5=120k, C3 = 220n (say), C4=4n7
For correct biasing R5 needs to be wired to 3.1V not 4.7V.

Noise results:
spot @ 1kHz 1.5uV/rtHz
unweighted noise sum 80uV

Significant improvement over 1M5 and 2M2 but not as good as other options.

The input impedance is probably high enough for a distortion pedal.

[FleshOnGear]

Many thanks to you, antonis and Rob. This is all very helpful. Even after tinkering for years, I'm still learning about what BJTs can tolerate; they seem to be a lot touchier than tubes and FETs. This is the first time I've ever tried to do something like this with a BJT - attempting to get a higher than usual input impedance and sculpting the low end at the input.

Last night I tried shorting R4, and that definitely helped the noise. Then I tried removing R4 while keeping the 470p cap, because the bass was too bloated with R4 shorted. The noise came back when I did this. I was shocked that just having the lone 470p input cap would behave this way. Interestingly, the noise is more of a brown noise than white noise, as if the noise is mainly occurring at the frequencies that are blocked by the small input cap.

So, Rob, I will try your approach tonight. I was originally trying to keep a clear DC path between the buffer and the CE stage, because I didn't want any charge buildup on a coupling cap pinching the signal. But, I think the smaller values used in your examples should be just fine.

Once a gain, thanks so much. Btw, what is the program you are using for your simulations?

[antonis]

I was shocked that just having the lone 470p input cap would behave this way.

X_C = 0.159/(f*C)..

4M2 at 80Hz, 423k at 800 Hz and so on..

You'd need a signal of about 4GHz for C4 to become comparable to Q1's Base r_bb

[ElectricDruid]

Btw, what is the program you are using for your simulations?

LTSpice. It's free software and it's certainly "quirky" but given that it's free and really rather powerful, you can't really argue. It's a very useful tool if you can get over the interface weirdnesses! I use it a lot for looking at the frequency rsponse of different circuits - for that sort of tone control design, it's invaluable. But Rob has demonstrated another useful side of it here - noise analysis.

[Rob Strand]

Many thanks to you, antonis and Rob. This is all very helpful. Even after tinkering for years, I'm still learning about what BJTs can tolerate; they seem to be a lot touchier than tubes and FETs. This is the first time I've ever tried to do something like this with a BJT - attempting to get a higher than usual input impedance and sculpting the low end at the input.

With JFETs and Tubes the high value input resistors still cause noise.  However with BJTs the noise is much worse because there is a noise *current* at the base.  The base noise current causes an Inoise*Rbase noise voltage at the base.   As the resistance (actually impedance) at the base increases the noise increases.  You can change the operating current of the transistor to optimize the noise but that doesn't mean the noise ends up being low.  It's a big topic and not easy to understand or tap into.

https://hifisonix.com/wp-content/uploads/2019/08/Noise-in-Transistor-Circuits-P-J-Baxandall.pdf

Last night I tried shorting R4, and that definitely helped the noise. Then I tried removing R4 while keeping the 470p cap, because the bass was too bloated with R4 shorted. The noise came back when I did this. I was shocked that just having the lone 470p input cap would behave this way. Interestingly, the noise is more of a brown noise than white noise, as if the noise is mainly occurring at the frequencies that are blocked by the small input cap.

Yes it will have a brownish noise spectrum due to the 470pF cap.  As the frequency increases past 220Hz (f = 1/(2*pi*RC) = 1/(2*pi*1.5M*470pF) = 225Hz) the cap impedance becomes comparable to the resistance of R4.  The resistance on the base circuit decreases and that decreases the noise voltage.  At high frequencies the cap has a very low impedance and impedance seen at the base of Q1 is low and the noise from both R4 and R5 is removed.

So, Rob, I will try your approach tonight. I was originally trying to keep a clear DC path between the buffer and the CE stage, because I didn't want any charge buildup on a coupling cap pinching the signal. But, I think the smaller values used in your examples should be just fine.

It's possible the two options with the parts moved don't sound like the original.  That's part of the redevelopment.  Circuit three is likely to have the least effect on the base cap charging.

https://www.diystompboxes.com/smfforum/index.php?topic=132305.0

Another issue is the circuit has some dependency on the gain of transistors Q1 and Q2.  I've assumed a hFE around 300 but if your parts are 400 the original circuit will behave slightly different that predicted in the simulations and the tweaked circuits won't be tweaked exactly right.

FWIW, in circuit 3 you might be able to tune the collector voltage to be exactly like your original circuit by tweaking R9 (I could have made it bias closer).    I've tried to make the frequency responses match quite closely but that meant using odd values (E24 series, 1%) for the parts - for the purpose of posting responses which match.  In practice you might be able to use rounder figure E12 values.

Once a gain, thanks so much. Btw, what is the program you are using for your simulations?

No problem.  I used LTspice.  It's widely used these days and available on the web.

[FleshOnGear]

You guys are rad. Rob, I used method 2 and the circuit is whisper quiet now. Thanks for the explanations. The transistors I'm using have hfe of about 509 for Q1 and 580 for Q2 if memory serves. The pre EQ is not quite the same. It sounds quite bassy now, and the distortion is a bit overblown in the lows. The pre EQ will need adjustment, and the tone control isn't quite right, either. Other than those nitpicks, the circuit sounds good. Thanks again.

[Rob Strand]

You guys are rad. Rob, I used method 2 and the circuit is whisper quiet now. Thanks for the explanations. The transistors I'm using have hfe of about 509 for Q1 and 580 for Q2 if memory serves. The pre EQ is not quite the same. It sounds quite bassy now, and the distortion is a bit overblown in the lows. The pre EQ will need adjustment, and the tone control isn't quite right, either. Other than those nitpicks, the circuit sounds good. Thanks again.

That's good news.  I do have faith in the theory for this stuff!

For circuit #2, with those transistor gains:
- try raising the added base resistor from 130k to 180k.  That will reduce the bass.
- the cap on the base remains at 12n.
  However since circuit #2 isn't an exact match 10n will match the bass better.
  From that perspective even try 150k instead of 180k.

[antonis]

Last night I tried shorting R4, and that definitely helped the noise. Then I tried removing R4 while keeping the 470p cap, because the bass was too bloated with R4 shorted. The noise came back when I did this. I was shocked that just having the lone 470p input cap would behave this way. Interestingly, the noise is more of a brown noise than white noise, as if the noise is mainly occurring at the frequencies that are blocked by the small input cap.

Yes it will have a brownish noise spectrum due to the 470pF cap.  As the frequency increases past 220Hz (f = 1/(2*pi*RC) = 1/(2*pi*1.5M*470pF) = 225Hz) the cap impedance becomes comparable to the resistance of R4.  The resistance on the base circuit decreases and that decreases the noise voltage.  At high frequencies the cap has a very low impedance and impedance seen at the base of Q1 is low and the noise from both R4 and R5 is removed.

I think OP simply removed R4, hence left C3's right leg floating..
If so, then C4 (470pF) was the sole input cap and input HPF corner frequency should be set by 0.159/[C4*(R5//h_FE*R6)], ignoring Q2 stage loading..