No signal in bypass (T-Rex Room-Mate)

[j_flanders]

I have a T-Rex Roommate which does not pass signal in bypass, just a faint, very low volume, buzzy noise. The buzzy sound is louder if I strum harder.

When active, the pedal works as intended.
All controls work but the buzzy noise is still somewhat present, but only on the dry part, not on the reverb part.
So my guess is that there's a problem with the electronic switching.

I could use some guidance in how to probe this issue.
Which components (4013?, FETs?, diodes? caps?) do I probe and for what (voltage? continuity?)

Unfortunately I don't have a schematic but I do have a lot of hi-res photos and some other schematics of T-Rex pedals which also use the 4013 and electronic switching.

Here are some gutshots I took:



More photos here:
https://postimg.cc/gallery/Rzdqjg0/b6fe29f4
I have many more on my computer in case you want a certain part of the pcb in close up.

Some T-Rex schematics:

More schematics here:
https://postimg.cc/gallery/pxYY431/0605c79d

[R.G.]

IF they use the same bypass setup, then the points to probe are the drains and sources of the JFETs, and with an audio probe.

Low, buzzy sound in bypass could be related to a fault in the "dry" JFET conducting signal from the input transistor buffer's emitter, or a failure in the parts that juggle the gate signals to the two JFETs. If the dry-side JFET gate signal isn't working right, the FET will conduct erratically as signal forward biases the gate at times. The diodes pulling the gates of the switching JFETs down to cause switching must switch nearly to ground at their cathodes alternately with the On and Off states. If the 4013 pins don't pull these down, the JFET won't turn "off" and gate off the signal from either dry or wet. The 4013 pins should also rise nearly to the 4013 power supply.

[j_flanders]

Here are the voltages on all the transistors and the 4013 pins in bypass and ON state:

BYPASS:


ON:

[PRR]

does not pass signal in bypass, just a faint, very low volume, buzzy noise.

The "bypass path" on your example circuit is remarkably complex. Two buffer transistors and the JFET. I realize this schem is not the same  as yours, but assuming the bypass philosophy is the same, I'd follow the red line.

[j_flanders]

does not pass signal in bypass, just a faint, very low volume, buzzy noise.

The "bypass path" on your example circuit is remarkably complex. Two buffer transistors and the JFET. I realize this schem is not the same  as yours, but assuming the bypass philosophy is the same, I'd follow the red line.

Thanks, I'll get the audio probe out tomorrow.

Maybe it's more complex because it's stereo out?
(edit: maybe by 'example circuit you meant the schematic I posted, not my pedal)

[j_flanders]

Here's a follow up.

I've sent support at T-Rex an e-mail asking for some help in trouble shooting this issue, hoping this is a common problem with a known cause or if they would supply me with the schematic (or at least the bypass part of it). I got a reply the next morning stating it wasn't evident without the pedal in front of them and if I could tell them the version number on the pcb. So I did.

I've tried to audio probe but this isn't easy because I don't know what paths the input branches of into nor if the audio stops because that's how the switching was intended.
Anyway, I have a dry signal up until the two JFET's in the bottom left corner but nothing after them. It stops there in bypass but I do have signal past the JFET's when in active mode. But when I was doing the audio-probing I didn't have traced it yet.

So, I've tried to trace the circuit. It's a hell of a job because the pedal has 3 pcb's which are multilayer.
So, I'm hoping with this partial trace someone can further guide me in trouble shooting.
Any capacitor I don't know the value of is listed as 8.2µF.
Voltages are listed as either 9v (Vdd) or 5V (Vbias). I'll measure actual voltages if needed.

If the on/active/reverb mode didn't work I wouldn't even bother, but no signal in bypass mode seems like fixable, even with this pedal.

Schematic:
direct link (hi-res): https://i.postimg.cc/084Szmpv/Room-mate-schematic.png


traced main pcb front:
direct link: https://i.postimg.cc/wHsZsZBn/front-T.jpg


traced main pcb back:
direct link: https://i.postimg.cc/08WFpqD1/back-T.jpg


Voltages bypass:
direct link: https://i.postimg.cc/7HjRWMKB/BYPASS.png


Voltages on/active:
direct link: https://i.postimg.cc/nZy8RZ5H/ACTIVE.png

[R.G.]

The DC voltages are pointing you to the FETS being mis-biased by the parts around them.

This is why: for a JFET to act as a non-popping switch, the drain and source pins (which are often interchangeable for switch-FET types) must be at the same DC voltage. In this case that voltage should be nearly 5V. To turn a JFET switch on, you let its gate float; this is done by those diodes connected to the JFET gates. When the driving signal goes high, the diode turns off and the gate floats.
To turn a JFET off, you reverse bias the gate-source (actually, gate-channel) diode junction. For this case, the drain-source channel should be sitting at about 5V, so pulling the gate diodes' cathodes down near ground.

The 4013 CMOS Q and not-Q outputs do a pretty good job of rising well above the 5V supply when high and nearly down to 0V when low. The Q and not-Q outputs are tied to either the wet-FET or dry-FETs' gates through their respective diodes, and are always opposite states, so there is never a time when both gate signals are the same - which is what is needed for flipping states.

One of your JFETs is the expected 5-ish volts on both drain and source, the others are not. So the trick will be to find out (1) why aren't all three of them 5-ish volts on both drain and source pins and (2) whether the gate signals are operating right. Use your DMM to find out why all of the drains and sources are not up at about 5V.

One caution: DMM inputs may have input impedances as low as 1M, although most are up about 10M. The high impedance of the JFET gates may mean that a 1M-input-DMM will read the gate voltages low. Don't know about yours, but just keep this in mind.