I’m going to answer a most definite “yeah”.

There is a great deal of misunderstanding in the discussion so far when it comes to digital. I see apples getting compared to dump-trucks (much less oranges) and then lots of discussion based on the erroneous comparison.
Being an embedded systems person professionally, I feel like this is one of the few places where I can step into a discussion around here as an "expert". :lol: Please excuse my hubris.

Like a gifted art student, digital is often misunderstood.
We don’t stick to 741 opamps for everything and base all opamp discussions around 741 parameters as if nothing else existed. Let’s not do the same with digital.
Digital was applied in products before cost and available technology were able to allow for it to be done at a comparable or superior level to analog, so it got a bad wrap right from the start. Bean counters at effects companies added to this greatly because its the object of an effects company to sell pedals and almost nobody would buy a $2800, 350ms delay.
In the digital world there are often several ways to get something done, just as there is in the analog world.
There are two distinct type of digital delays found in effects land. One uses memory which is as wide as the A/D & D/A, while the other uses a single bit (
ever seen 1 bit D/A on a nice CD Player?) and a super high sample rate.
The first type is called "
successive approximation" because the process involves trying different output values until one which is very close to the actual value is found. It uses a fast counter attached to a D/A and a comparator to do this.
The second type is called "
Delta-Sigma" or "
Sigma-Delta". I think Motorola trademarks one name, so the other order is also in use. The Sigma stands for time and the Delta stands for change. The sample rate is increased by many times. 32 times is a good value to think in terms of as an effects level minimum. 64 or 128 times is better still. The digital sample width is reduced to one bit. A zero means "less voltage" and a one means "more voltage". To put out 50% voltage, a sigma-delta converter output will look like a square wave at the sample frequency/2. That might sound awful, but the sample frequency might be 1MHz so a simple RC filter is able to remove the digital artifacts to the point where they're a couple hundred dB below the signal content (!) :shock:.
When you use successive approximation analog to digital converters you are subject to the limitations that are inherent in the method and in the technologies available to make that method available to you, the circuit designer. The Delta-Sigma technology has problems of its own, but it has enormous advantages and the disadvantages are not what you might think.
One big disadvantage of the SA style is that you usually need tons of device pins, which is expensive. The integrated chips try to solve that by bringing the RAM internal. Now they can even benefit by using RAM that is wider than commonly available chips. The ones with the integrated RAM tend to leave out some detail that allows for easy comparisons between chips.

. The HT8955 is (was) an oddball in that it used SA converters, but then shifts the data serially into a 1 bit wide DRAM, which has more address bits to compensate for fewer data bits and is cheap in big amounts.
Luckily, the PT2395 is a currently manufactured chip that uses external DRAM and Sigma-Delta technology converters. Matsushita used to make the M50195P too. One feature of chips that use sigma-delta is that they all seem to use an external comparator in the sigma-delta modulator. Usually from what I've seen this is a LM311 or similar. I don't know what process limitation keeps that function from happening on the same chip. You’ll also see this in digital delays and flangers produced by Maxon/Ibanez.
PT2399:
http://www.ortodoxism.ro/datasheets/PrincetonTechnologyCorporation/mXyzsyzt.pdfHT8955:
http://www.selectronic.fr/includes_selectronic/pdf/Holtek/HT8955.pdfPT2395:
http://www.ortodoxism.ro/datasheets/PrincetonTechnologyCorporation/mXuuysq.pdfM50195P:
http://www.datasheetarchive.com/datasheet/pdf/10/1021988.htmlEnough of this rambling......
In short... sigma-delta chips can beat the pants off SA chips.
SA chips (less than lets say 18 bits wide) work very poorly for subtle information.
Narrow SA chips like 8 or 10 bit units are especially poor.
Sigma-Delta has wonderful performance where SA falls down.
Sigma-Delta is cheap and easy now that chips are fast and memory is cheap. This has not always been the case!
The sound of a BBD based delay comes from multiple places. There is the processing inherent in the BBD, there are the LP filters before and after the delay, and there is the companding that most BBD designs use. The companding is often forgotten about, I assume because people will just say that it’s a symmetrical process, but only in a perfect world.

A dial to add a variable amount of BBD processing to a digital sigma-delta delay is a great idea.... especially since the BBD can be clocked at whatever rate is desired to limit bandwidth, and now that parameter is exclusive of the delay time

!
Heterodyning isn’t an issue because the clocks are separated by a VERY wide range.

I think the ideal would be a sigma-delta digital delay followed by a short BBD with independent clocking. The digital delay in front allows for the bulk of the delay time as well as perfect clean echo, and you can also have digital feedback which gives perfect loops if you want that. If the feedback is switchable between digital-only, and analog taps both before and after the BBD, while the output is selectable between pre and post BBD, you get one heck of a delay unit.
Adding a variable frequency lowpass to the feedback loop is also an idea.
How many people here have tried adding a little compression to the feedback loop of a digital echo?

Now add modulation to the digital and analog delay clocks and sea-sickness here I come!
OK…. Now I’m out of coffee. :mrgreen: