For a long time, I've tried to get a sample hold circuit to work well at 9 volts, that didnt require large IC's, exotic parts, and that would work over a large voltage range. CD4016/4066's are cool IC's but using one when you only need one switch is just a wast of real estate. This one is especially simple, especially considering that some of the parts could actually be left out, and still work.
Here's the schematic.
http://www.subdecay.com/samplehold.jpgEssentially anything you put in that is within the opamps voltage range will come out the other side in sample form.
The first opamp could actually be turned in to a noise amplifying circuit with reverse biased zener diode, and some heavy amplification... may require a trimmer somewhere since noise per diode can vary quite a bit.
R10 is intended to be a fairly large resistor like 1M or so... you dont want low impedance square edged voltage signals running all the way across your circuit board, but depending on layout this could be left out. C2 is intended to work with R10 to keep the sample voltages from changing too abrupty and causing ticking... of course you could do this after the ouput as well, and for some circuits it may not be needed at all. R5 and C1 already do this to a point as well.
IC1 can be just about any Jfet input dual opamp.
IC2 should be a low power single opamp, and should be well decoupled from the power supply to avoid ticking.
The mosfet i used was a BS170. I tested it with about 10 different ones, and it worked with all of them.
Due to the narrow power supply voltage, the signal is reduced at the input, so that the drain to source voltage at the mosfet is never too great, and it can turn off and on all the way. The input should be centered at ~ half the supply.
All 4.5 volt connections should be low impedance. A pair of 10K resistors and a 100uF cap for a voltage divider should work, althoug I was actually buffering my bias voltage with an opamp.
