Author Topic: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?  (Read 48287 times)

Dragonfly

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #20 on: August 14, 2008, 08:55:33 PM »
It seems like ...and I'm probably wrong about this... but this seems like a variation on the same theme. To me, the best time to use a trimmer is when you are looking to vary the bias (after the circuit is complete) ...and since, to my knowledge, jfets aren't really temperature dependent, isn't it a better solution to find the operating point you want for the jfet and just bias it with fixed resistors ? I posted a self biasing 18v jfet booster in another thread that, because of the way it's set up, works with a large variety of jfets....and no one noticed. Not a peep. It was a Marston circuit, and thats one guy who knows more about jfets than the average EE, so I would make the safe assumption that it is a good circuit. To me, trimmers are GREAT for using on a breadboard to find your bias points and test where you actually want the jfets voltages to be, but past that point a fixed resistor will stay accurate, not be as prone to damage, voltage drift, etc.

I dont know...I should probably just shut up and let the smart guys debate it... :D

John Lyons

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #21 on: August 14, 2008, 09:18:43 PM »
Andy
That schematic you posted uses a voltage divider and then a large resistor from the junction to set the impedance.
Can you use that divider for more than one FET stage adding a resistor from the bias junction similar to opamp biasing (Vref) etc?
And I assume adding a cap from the divider to ground would help?
Any examples of this around. I haven't seen any....

John

Basic Audio Pedals
www.basicaudio.net/

aron

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #22 on: August 14, 2008, 10:09:24 PM »
>- I never advocated a trimmer on the source, in fact, I never advocated anything except that a trim in the drain to adjust the quiescent drain voltage is wrong.

So Jay, what should the hobbyist do? OK, so it's wrong. So almost all the schematics posted are wrong. Now what?

We got it. It's wrong. So what do we do with this? My pedals that I like are "wrong". Am I supposed to fix them? Am I supposed to not post another circuit with a JFET in it until I can figure out how to fix the problem?

This can go on and on. Tolerances have affect a circuit a lot too. No one (that I know) measures the capacitors and resistors and indicates their exact values on schematics. To be as accurate as possible, I would assume we need to do this too. In fact, values of capacitors might be just as important as any other variable. How about pots???? Ever measure them? They are all over the place.

What is everyone here trying to say?

Aron

Gus

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #23 on: August 14, 2008, 10:39:15 PM »
Dragonfly
 If it is the one in the members section.  I noticed it it looks like right out of AN102  a mix of self bias and fixed bias,  Google MK219 oktava schematic you might like this gain stage.  Look for the harvard schematic.

  When you increase voltage make sure to note what happens with greater drain to gate voltage differences.

Aron
 what I am trying to say for 9VDC  "paint by numbers" Fet builds for beginners selecting the FET before using it might help to make the effects more repeatable.

  Neumann u87 and KM8x microphones use a self bias with a cap bypassed selected source R: however I like to select fets in a range for that type circuit.




stm

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #24 on: August 14, 2008, 11:21:46 PM »
As this appears to be most likely directed at me...
Not at all.

- I never called a trimmer on the drain a 'parlor trick'...
No one said or implied you did.

- How do you know a drain trimmer 'does the job' in a circuit, if by simply adjusting it you completely change the circuit's 'job' entirely?? In fact, with each twist of the trim you change the entire circuit itself.
The same occurs with a source trimmer, only to a worse extent.

- JFETs don't follow a strict 'square-law'. See Shockley's proof. The 'square-law' just happens to be a good approximation. This goes even more so for short channel JFETs like the J201. A MPF102 is probably closer to a square law approximation than any other of the 'common' JFET types normally used in FX.
Yes, the square law is an approximation, yet it still allows you to model, predict and study the behavior of a JFET circuit with reasonable accuracy.  In fact, the use of approximate math models and linearization around an operating point are engineering techniques that have been used successfully in many disciplines for decades, if not centuries.  The fact that it is not perfect down to the microvolt doesn't invalidate the analysis at all, and it is not really necessary to have better accuracy just to estimate an operating point and the general behavior of the stage.

- Qualifying designs through limiting the operation of the JFET, and the subsequent formulas used, to only the saturation region is convenient, but is simply not in the slightest bit realistic for our purposes. Unless a JFET stage is used EXCLUSIVELY to be as 'clean' a boost as possible, which, as we are talking about JFETs used in distortion circuits, ain't the case, one HAS TO consider the operation of the JFET in the ohmic region. To ignore this is to limit one's study of the distortion created in a JFET to the hard clip that occurs against the source resistor and completely ignores the 'squashing' that occurs when the signal causes the JFET to operate in the ohmic region - in my opinion the entire raison d'etre for using JFETs in the first place - why the hell else deal with the characteristic spreads that are at the core of this entire 'discussion' and the nightmare that is JFET design?
I disagree here for two reasons:
1) The ohmic region is very narrow in comparison to the total output.  For instance, when using a J201 the ohmic region extends just for about VP, i.e roughly when the drain voltage varies from 2*VP down to VP.  So, for an 18V powered circuit like the Supreaux Deux, the ohmic region extends for about 0.8V of the maximum 16.4V of constant-current output range.
2) Typical JFET circuits have two, three or four gain stages.  It is very rare that all stages are clipping.  In fact, the first stage rarely clips, and as the signal fades more and more stages quit clipping, until the last stage runs out of enough signal to clip.  So, you have for most of the time one or more stages entirely within the constant-current region.  Harmonic content, especially 2nd harmonic determines the duty cycle for the subsequent stages that go into clipping.  They are important to the overall sound.  It is the biasing point that determines when the input signal will reach clipping, and also if clipping will occur on both sides simultaneously or on the positive or negative peak first. This does affect sound.

- Changing the resistance in the drain changes the gain of the stage. Period.
Entirely true.  However it is equally true that changing the source resistor (RS) affects the JFET transconductance (gm), whether the source resistor is bypassed or not.  And since gain can be expressed as Av= gm*RD, it does depend on RS by means of gm.  This is the crux of my initial post.  RS does vary gain also.  To what extent?  To the same extent as varying RD, as unbelievable as it sounds.

I used three J201's: specimen A with Vp=0.5V and Idss=0.1mA, specimen B with Vp=0.8V and Idss=0.24mA, and specimen C with Vp=1.2V and Idss=0.4mA.  They are pretty representative of low, medium and high VP's.

First, I biased the three JFETs according to the Fetzer Valve values using RS equal to the recommended value for the middle device (1100 ohms), and tuned the drain trimmer to the recommended drain values of 6200, 10900 and 22000 ohms.  Gains obtained were: 10, 14 and 19 dB, respectively. 

Second, I changed the drain resistor for the recommended value for the middle device (10900 ohms), and tuned the source trimmer so as to obtain the recommended drain voltage (same as in the first part).  Required source trimmer values were: 2430, 1100 and 180 ohms, respectively.  And gains obtained were again 10, 14 and 19, respectively.  Decimal differences were less than 0.5 dB with respect to the previous case.

Conclusion: tuning with a drain or source trimmer under similar conditions in a controlled experiment produced the very same gains.  In each case the target drain voltage was chosen for maximum dynamic range according to the particular VP of each stage.

Moreover, drain trimmer resistor required only a 3:1 variation, while the source resistor required a 13:1 variation.  Imagine trying to accurately set 180 ohms for the last stage using a 5k source trimpot.  Very difficult indeed.

And not content with the above, I run the FFT analysis on each case, feeding each stage with its maximum clipping-free input signal, i.e. +/-VP.  The results showed that the 2nd harmonic in the drain trimmer case varied from 11.5% to 12% to 13.8%, while in case of the source trimmer it varied from 8.3% to 12% to 20.3% for the three specimens under test.  It is evident that the source trimmer affects greatly the 2nd harmonic and thus produces a much wider variation in sound than drain trimmer.

Based on all the above, I only see disadvantages in using a source trimmer over a drain trimmer.

I'm open to explore the subject on a respectful and collaborative basis, but I won't debate any more unless solid facts or evidence are presented, such as a simulation, practical measurements, a mathematical model, or a paper.  Each of these posts takes me over an hour, apart from the simulation/breadboard time to gather actual facts before posting, and I also have to think and write in a foreign language.  Time is too short for me lately, so I have to divide myself between work, family, DIY and sleeping hours as efficeintly as possible.

Best Regards,

Sebastian.
« Last Edit: August 14, 2008, 11:37:36 PM by stm »

stm

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #25 on: August 14, 2008, 11:41:56 PM »
Google MK219 oktava schematic you might like this gain stage.
Look for the harvard schematic.
I haven't succeeded finding any of these.  No mic schematic found.  Also, looking for the Fender Harvard only led me to two versions of the valve amps (6G10 and 5F10 models).  If adding solid-state to the search I just found solid-state units for sale or HC reviews.

Could someone post a link if you find a schem, please?
« Last Edit: August 14, 2008, 11:43:39 PM by stm »

aron

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #26 on: August 15, 2008, 01:36:41 AM »
>what I am trying to say for 9VDC  "paint by numbers" Fet builds for beginners selecting the FET before using it might help to make the effects more repeatable.

Sounds like a good idea to me Gus. Thanks for clarifying!

aron

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #27 on: August 15, 2008, 01:40:36 AM »
Thanks everyone for expressing their point of view. This has been a good thread. I now understand a large part of it. Thanks Sebastian, your post was very clear to me.

B Tremblay

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #28 on: August 15, 2008, 08:54:21 AM »
I found the mic schematic on this page.
B Tremblay
runoffgroove.com

earthtonesaudio

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #29 on: August 15, 2008, 09:08:58 AM »
Maybe someone with a lot of time and energy (i.e. not myself) on their hands could design a simple JFET-selecting circuit which could easily tell you this JFET should be used in that effect, that JFET should only be used as a switch, etc.  Something a "noob" could put on the breadboard or perf easily, with a socket for the JFET and points at which to hook up a voltmeter?

DougH

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #30 on: August 15, 2008, 09:30:04 AM »
Quote
I used three J201's: specimen A with Vp=0.5V and Idss=0.1mA, specimen B with Vp=0.8V and Idss=0.24mA, and specimen C with Vp=1.2V and Idss=0.4mA.  They are pretty representative of low, medium and high VP's.

First, I biased the three JFETs according to the Fetzer Valve values using RS equal to the recommended value for the middle device (1100 ohms), and tuned the drain trimmer to the recommended drain values of 6200, 10900 and 22000 ohms.  Gains obtained were: 10, 14 and 19 dB, respectively.

Second, I changed the drain resistor for the recommended value for the middle device (10900 ohms), and tuned the source trimmer so as to obtain the recommended drain voltage (same as in the first part).  Required source trimmer values were: 2430, 1100 and 180 ohms, respectively.  And gains obtained were again 10, 14 and 19, respectively.  Decimal differences were less than 0.5 dB with respect to the previous case.

Sebastian, did you use a bypass cap on the source in this experiment?
"I can explain it to you, but I can't understand it for you."

Gus

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #31 on: August 15, 2008, 09:33:24 AM »
earthtoneaudio

  Look at the geofex fet matcher and read my post about IDSS measuring.  This simple two sample should help to select fets if the same brand.  It will be important that the forum adopts a standard way to do this to make sure it can be repeatable.  

this looks good

http://www.forsselltech.com/downloads/schematics/JFET%20Jig1.pdf

EDIT I should add when I posted paint by numbers I meant it in a good way.  That is one way to start to learn.  A fet circuit for a beginner could discourage them.  Until people started posting about transistors for FFs and ways to match and measure a beginner building a FF could have problems.  That is one reason I made the npn boost little or no selection needed for the transistor most small signal Si NPNs should work.

In the oktava circuit look at the mix of self bias and fixed bias and the two resistors in the source leg one not bypassed for a mix of bias and gain control.  In different 219s there are two numbers written on the transformer they are the two  Rs selected for the fet used.  I am guessing the fet is measured and a look up table or formula is used to select the resistors.


 
« Last Edit: August 15, 2008, 09:51:27 AM by Gus »

DougH

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #32 on: August 15, 2008, 09:34:08 AM »
>what I am trying to say for 9VDC  "paint by numbers" Fet builds for beginners selecting the FET before using it might help to make the effects more repeatable.

Sounds like a good idea to me Gus. Thanks for clarifying!

Aron, I think what needs to happen is we need to establish some criteria for pre-selecting the FETs. This could be like schematics where people note recommended hfe for bjt xsistors and so forth. I agree with Gus that especially for hobby building that specifying a selection criteria for the device is the easiest way to go. Then the designs can just use fixed resistors and etc.
"I can explain it to you, but I can't understand it for you."

DougH

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #33 on: August 15, 2008, 09:37:47 AM »
As this appears to be most likely directed at me...
Not at all.

- I never called a trimmer on the drain a 'parlor trick'...
No one said or implied you did.

Jay, it was aimed at me and I answered that in my first post.

Let's just drop it...
"I can explain it to you, but I can't understand it for you."

stm

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #34 on: August 15, 2008, 10:07:34 AM »
Quote
I used three J201's: specimen A with Vp=0.5V and Idss=0.1mA, specimen B with Vp=0.8V and Idss=0.24mA, and specimen C with Vp=1.2V and Idss=0.4mA.  They are pretty representative of low, medium and high VP's.

First, I biased the three JFETs according to the Fetzer Valve values using RS equal to the recommended value for the middle device (1100 ohms), and tuned the drain trimmer to the recommended drain values of 6200, 10900 and 22000 ohms.  Gains obtained were: 10, 14 and 19 dB, respectively.

Second, I changed the drain resistor for the recommended value for the middle device (10900 ohms), and tuned the source trimmer so as to obtain the recommended drain voltage (same as in the first part).  Required source trimmer values were: 2430, 1100 and 180 ohms, respectively.  And gains obtained were again 10, 14 and 19, respectively.  Decimal differences were less than 0.5 dB with respect to the previous case.

Sebastian, did you use a bypass cap on the source in this experiment?
Hi Doug.  These experiments were done WITHOUT source bypass capacitors for the following reasons, as this corresponded to Fetzer Valve case, and because I knew the maximum clipping free input range (+/- VP) and optimum drain biasing voltage, so I could make a fair comparison.

Now I have advanced more in the math analysis of the JFET circuit, and I hope soon I'll be able to calculate the optimal biasing point for the bypassed case (maybe it's the same?), and the maximum input voltage range.

So far now I can provide formulas for the gain for both the unbypassed and bypassed case.  Notice the direct dependence of gain with respect to RD, and a nonlinear dependence with respect to RS (since it is included also in the square root term):



It is interesting to notice that now it is possible to calculate the gain increase you get in a particular stage when adding the source bypass capacitor.  As it can be seen, it depends on the source resistor, which in turn sets the operating point.

Example 1: what would be the gain obtained without source bypass for a J201 with VP=0.8 V, IDSS=0.6 mA, RS=1100 ohms and RD=10000 ohms?
Substituting in the first equation we get a value of 4.7 times, or 13.4 dB.

Example 2: what would be the increase in gain if adding a source bypass capacitor in the previous example?  Substituting the values in the third equation gives 2.07 times or 6.3 dB more gain when adding the source bypass capacitor.  Thus, final stage gain would be 13.4+6.3 = 19.7 dB.

« Last Edit: August 15, 2008, 10:19:22 AM by stm »

DougH

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #35 on: August 15, 2008, 10:41:46 AM »
Sebastian,

The reason I was asking about whether you used a source bypass cap is because in your experiment where you compared gains by varying the size of the source resistor, you didn't take into account the degenerative feedback that the resistor contributes. And yes, that will make the gain vary quite a bit depending on that resistor size.

I'll have to digest your equations a little later when I have more time.

Thanks for taking the time to post the equations and the results of the work you did.

Doug
"I can explain it to you, but I can't understand it for you."

stm

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #36 on: August 15, 2008, 12:25:56 PM »
The reason I was asking about whether you used a source bypass cap is because in your experiment where you compared gains by varying the size of the source resistor, you didn't take into account the degenerative feedback that the resistor contributes. And yes, that will make the gain vary quite a bit depending on that resistor size.
Both the simulation (done using Microcap 7 for Transient and AC Analysis) and the algebraic analysis do include the effect of the degenerative feedback introduced by RS.  Proof of this is that the gain equations do include the RS term in the denominator, and as RS increases gain reduces by virtue of the degenerative feedback.

I'll have to digest your equations a little later when I have more time.
When the complete analysis is posted, the assumptions and derivation of the equations will be included.  This should allow proper review of the whole process.

Thanks for talkng the time to post the equations and the results of the work you did.
Your welcome.

Sebastian

aron

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #37 on: August 15, 2008, 04:07:49 PM »
>Aron, I think what needs to happen is we need to establish some criteria for pre-selecting the FETs. This could be like schematics where people note recommended hfe for bjt xsistors and so forth.

That's great.

Now how far are we going to take this? Are we going to insist that people measure their caps and posts and resistors BEFORE posting so that people can get repeatable results? How about cap types and brands since it does make a difference and the differences can be quite striking?

Where do we draw the line. It's like notation - not even close really.

Aron

earthtonesaudio

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #38 on: August 15, 2008, 04:24:45 PM »
Am I just assuming things here, or is all this discussion solely based on the common source amplifier configuration? 

Do common drain/source follower and common gate configurations suffer from the same problems having to do with device variations?

frank_p

Re: What's the real story on SOURCE v/s DRAIN trimmers in JFET circuits?
« Reply #39 on: August 15, 2008, 04:56:48 PM »
I posted a self biasing 18v jfet booster in another thread that, because of the way it's set up, works with a large variety of jfets....and no one noticed.
I dont know...I should probably just shut up and let the smart guys debate it... :D

What ?  :icon_lol:
You're funny Andrew.
You posted that schematic with no comments.  I was just starting to read the app. notes. ...
What can you say when a cowboy draw his six-shooter faster than his shadow...