ADC op-amp buffering

[straylight]

Greetings,

I'm currently working on a pedal design using an Atmel Xmega128A1. For a little background on my skill level, I am a guitarist who is also a software engineer. This means that I know how to program the AVR MCU, but I am a little light when it comes to the electrical side of things.

The AVR MCU has an ADC built in that has an accurate 1v reference, so that should be perfect for the guitar's signal. However it is my understanding that I will need to buffer the guitar's signal to the ADC with an op-amp.  I have some OPA1611's lying around and I was wondering if some one could advise me on a circuit that uses this opamp to buffer the guitar input.  I know I can do a simple negative feedback loop with the opamp to keep the voltage the same (or add a resistor and a pot for a gain control), but I am not sure if I should add any other components to filter the signal.  Thanks in advance.

[armstrom]

First of all, Welcome!
A non-inverting opamp buffer is the way to go for sure. How familiar are you with op-amp circuits? I'll make some assumptions but let me know if something isn't clear.
You can keep it simple and leave out any filtering for the time being. If you keep your wires short then you might not notice any issues. Adding filtering later is pretty easy. I'm not sure if your ADC has a blocking cap to block any DC offset voltage but with a single supply op-amp circuit you will need one.  You can use pretty much any "large" value cap here. 1u and 10u are popular values.

Take a look at this datasheet to see how they buffer the inputs.

The input buffer on this one is the middle-bottom circuit snip-it.
http://www.oct-distribution.com/datasheets/SKRM-C8-G01.pdf

Here's a breakdown of the circuit. signal from the guitar arrives at IN net label. There's a huge pull-down resistor (22M) followed by a 1u DC blocking cap. That cap is blocking the reference voltage from getting into your guitar (would cause scratchy volume and tone pots on the guitar).  Next there's a 1M resistor to the reference voltage which sets the input impedance and sets the virtual ground to be the reference voltage. You then have your standard non-inverting buffer and a net label to take you to the DSP board. Now, this one does NOT have a blocking cap on the output because the DSP chip has its own. If your DSP doesn't have DC blocking caps you'll need to add one here as well. 1u will work just fine for a guitar signal. Make sure you orient the positive lead (assuming you use a polarized electrolytic) toward the output of the op-amp since that lead will have the output waveform riding on top of the virtual ground of your reference voltage (+4.5V in this case).  It's always safer to use a non polarized cap here just in case there's DC on the inputs of your DSP.

If you do end up with RF interference in your signal you can apply some of the filtering techniques shown here:
http://www.generalguitargadgets.com/richardo/distortion/index.html

Scroll down to the example design at the bottom of the page. Ignore all the stuff int he feedback loop since you will not be creating a distortion effect, but read the description of what each of the components between the jack J1 and the non-inverting input of the op amp are for. That will give you somewhere to start.

[straylight]

Thanks for the great reply. That schematic is going to get me a long way.  I was pretty much able to follow just about everything you were talking about, but I still have one major issue. My plan is to put all of this stuff into a pedal.  I am going to be using a 5v power supply for the pedal because that is what my MCU DSP) proto board takes.  The issue I have is how can I apply the rail voltages to this op-amp without using biasing. I would rather not use biasing because the guitar signal is already in a great range for the MCU's ADC reference voltage of 1v to -1v. Biasing will force me to use the 5v as a reference, which will reduce my sample value resolution, unless I am mistaken.

The site you linked also showed some alternative methods to biasing. My op-amp requires a min of +/-2.25v on the rails so the bipolar power supply circuit will only leave me with +/-2.5v on each rail.  Is it possible to do the two batter power supply circuit using a single wall wart (my eventual power source)?

[straylight]

Actually I think this op-amp stuff is starting to sink in. If you bias the input signal with a DC offset, does that cap after the op-amp then remove this offset (thus leaving an AC signal centered around 0)?

[armstrom]

no, the blocking cap simply removes the DC component of the signal but it will still be referenced to the virtual ground of the op amp circuit which is half your supply voltage. So a 1V sin wave will range between 5.5V and 3.5V. The best thing to do when you're wondering what happens with little circuit snip-its like this is to download a free copy of LTSpice and just simulate them.

Here's one way to think about it.  Imagine your op amp stage has a gain of 10 and is run from a single 9V supply. So if you give it a 500mV peak to peak signal (+250mV to -250mV sin wave) you would expect to get a 5V peak to peak sin wave out of it. If the coupling cap "moved" your signal back down to a zero offset voltage then you would expect to see a sin wave of +2.5V to -2.5V relative to ground. However, where will the op amp get the supply voltage to pull the signal below ground? The voltage on the output has to come from somewhere and there is no negative supply voltage anywhere to be found capable of pulling the signal below ground. So you will simply have a sin wave that varies between 7V and 2V. You still have a 5V peak to peak signal, it's just offset by 4.5V. The purpose of the coupling cap is to eliminate the constant 4.5V DC signal that you will get even if there's no input into the buffer.

-Matt

[straylight]

Just wanted to follow up and say thanks for the help. I was able to get the buffer circuit working, so now I'm onto the digital portion of the project.

[armstrom]

Cool, glad I could help.
-Matt

[armstrom]

I have to apologize. I gave you totally incorrect information regarding the action of the coupling cap after the buffer. You were correct, the capacitor does center the signal around 0V DC, not around the bias voltage as I incorrectly claimed. I'm not sure what I was thinking at least you got your issues worked out regardless of my attempts to steer you wrong