How many BBDs can a MN3101/2 clock ?

Started by Yuan Han, April 04, 2004, 05:49:02 AM

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Yuan Han

Heyo,

More QNs on BBDs,
Searching past forums, I've seen that for MAXON AD999, 2 MN3101 clocks 4 MN3008 (2048 stages), and that Scott's AD3208 has MN3102 clocking 2 MN3208 (2048stages, low voltage version).

Now, the data sheet of MN3101/2 says that it can handle up to 4098 stages, but i'm thinking, isn't that for 1 chip ? That is to say, if I clock a particular MN3208 using a MN3201, and clock another MN3208 using the same MN3201, the MN3201 doesn't "see" two MN3208s because they are in parallel ?

That is to say that, shouldn't it be possible to clock "unlimited" number of < 4096 stages BBDs parallel using a single MN3101/3102 clock chip ?

(somehow I think I'm wrong because Maxon uses... 2 clock chips. Eh, then to have the same delay for the same 2 chips they would need a dual gang pot for their delay time ?)

And another question:
MN3101/2 clock chips operate based on the resistance/capacitor thingies, which CD4049 chips used to clock BBDs take in a VCO source. Could anyone explain, conceptually, how a MN3101/2 clock chick can be used to take in an "input" voltage instead of a input resistance ? (cause i've well, boss choruses do that.., but i'm abit lost, esp with transistors).


cheers
Han

Paul Perry (Frostwave)

The load on the clock chip output doesn't depend on how many stages there are inside the chip it is driving, it is driving a single CMOS input for each BBD chip.
If you want to save clock chips, I think you could just use one or more buffers, but you might have to check the output levels to make sure they match what the BBD is expecting (probably something weird, requiring level shifting).
When you see two clocks, it is probably a flanger, where the point is to have different delays on the two BBDs.

Yuan Han

Actually I had another look at the MN3102 datasheet... they had some limitations based upton the powerconsumption, which will depend on the load that it drives, which is the capacitors in the BBD. Seems like they drew the line for a maximum of 4 x mn3207 which is 4096 steps.

But then again, buffering (i'm thinking a unity gain opamp thing?) might work as long as it doesn't exceed that power consumption in the datasheet. sure beats having 2 clock chips...just for delay..


I was talking about AD-999 (maxon delay), in one of the earlier forum posts, which was said to have 2 clock chips for 4 mn3208, so i was wondering if the 2 clockchips were infact neccessary.

thanks
yh

puretube

Quote2 clock chips for 4 mn3208, so i was wondering if the 2 clockchips were infact neccessary
Yes - I disagree with Paul (this time...)