NEW CIRCUIT DESIGN: NZF Flanger

[StephenGiles]

Is there a Photoshop (or other imaging software) trick for converting a PCB pattern as if it is viewed from the component side?

[StephenGiles]

Easier I suppose to print on to transparency film. I want to draw 4046/3102/BBD circuit from the Bergfotron delay.

http://hem.bredband.net/bersyn/VCF/vcd.htm

[DrAlx]

Is there a Photoshop (or other imaging software) trick for converting a PCB pattern as if it is viewed from the component side?

I just mirror the image (i.e. flip it horizontally L<->R).  Most packages or image viewers let you do that.

EDIT: And while we're on the subject of mirroring stuff.  I was trying to work out how the FoxRox Paradox works and someone posted some nice detailed photos of the front and back of the board on one of the other forums.  Problem is they were not plan views.  So I loaded the photos into a graphics package and
1) Corrected them for perspective (so they had vertical sides)
2) Mirrored the back view so it became an X-ray from the component side.
3) Rescaled them so all the traces lined up with the components.  
I could then put the two images on top of each other and fade between them so I could see which tracks went where.
That's how I worked out that the Paradox just ties the two outputs together on each BBD, and doesn't do any sort of capacitor smoothing on either the Vgg voltage for the BBD or the bias voltage for the BBD.
Here are links to the results...
http://i1368.photobucket.com/albums/ag185/DrAlx/foxrox_paradox_warpA_zps69b32d89.jpg
http://i1368.photobucket.com/albums/ag185/DrAlx/foxrox_paradox_warpB_zpsc30b444c.jpg

[DrAlx]

              HETERODYNING GONE + LFO FIXED !!!
Puretube you are a STAR!!!  Thank you.

I just hacked in the reworked supply as suggested (removed daisy chain) but had to leave the ground plane in place.
I used long wires on the back of the board and split the supply 4 ways with a 10R +470uF on each of the 4 sections...
i.e.
   1) Audio ICs (note that I  left BBD chips powered using the audio supply as it would have been too messy to redo them)
   2) VCO/clock buffer 1
   3) VCO/clock buffer 2
   4) LFO

I put a 100 nF on the main 470uF power cap (the common connection point) but didn't bother with 100nF across the other 470 uFs.

If I turn up the gain on the digital multitrack recorder (to model a high gain amp) and use headphones, then I can pick up very faint heterodyning noise buried deep in all the other regular hiss and crap which is much louder.  So it is gone for all practical purposes.
I tried removing the caps at the BBD inputs to see if they were necessary, and yes they were.  When I took them out the heterodyning came back.

So there are bunch of things for me to do now:

1) I want to try build it with 4 ground sections for symmetry between both supply rails.
I want to build it on vero WITHOUT ground planes.  If I can do that and pull it off successfully, then it will make for an easier vero build for everyone else who want to give this circuit a try, and the conversion from vero to single-sided PCB layout will be a no-brainer.

2) I also want to lower the part count.  So before the vero build, I am going to gradually butcher the current build, starting with the active filter before the BBDs.  Then the active filters after the BBDs.  I will probably leave the rest of it, but am curious to know how much effect my other fixes (i.e. a cap on the base of the current source transistors) are still doing something useful.


Watch this space...


Now time for some beers.

[puretube]

part count: throw out IC9 & 12: save 32 holes...

[12Bass]

Nice detective work!  Will continue to watch your progress.....

[StephenGiles]

part count: throw out IC9 & 12: save 32 holes...

No - clock buffers to the younger generation are like "go faster tape" on a car in our day!!! Remember that??

[Fender3D]

part count: throw out IC9 & 12: save 32 holes...

No - clock buffers to the younger generation are like "go faster tape" on a car in our day!!! Remember that??

Thank God,
I guessed I was the only "elder kid" building a flanger without clock buffers...

[DrAlx]

I'll try removing those ICs and jumper some wires between the empty socket holes.
If the waveforms at the clock pins still look sharp then great.

[DrAlx]

Update on my further tests / butchering process.

Removal of pre-BBD Sallen-Key LPF:  I hacked in a toggle switch so I could short out the pre-BBD Sallen-Key LPF and do an A/B comparison with/without.
 Result: Audio is the same without the Sallen-Key but has more hiss (although not excessive), and you could always spin that as more clarity.
 When I turned up the gain on my recording box,  I noticed the residual heterodyne noise is even quieter without the Sallen-Key than with it.
 So I think it is definitely worth removing that Sallen-Key filter.

Effect of tying together the BBD output pins:  I wanted to confirm what Puretube was saying for myself, so I took another one of my builds that has separate resistors on the BBD outputs.  I zoomed in on the clock noise on the output wave form and saw it increased a lot when I shorted the 2 BBD output pins together.  Lesson learned.

Effect of clock buffers:  The waveform at the clock pins is definitely not sharp without the buffer chip, and the rise/fall times are outside the 500nS spec of the MN3207 datasheet.  But it still works without the buffers, so what about the sound?
I did a test using another one of my 3207 builds because I could easily flick a switch on it to just hear the delay line by itself (not mixed with anything else).  I recorded with a clean guitar with the sweep switched off and the clock maxed out (at around 800kHz at the clock pins).  I was expecting the buffers to give clearer or louder treble, but when I did an A/B comparison between my recordings it was hard to tell if any change in sharpness was due to my playing or the buffers.  So based on that one test I'd say the difference is marginal although it was hard to do a proper comparison of volume levels the way I did the test.  When I have time I'll have a go at measuring the BBD frequency response with/without buffers, just because I'd like a less subjective measure of the actual difference.

 

[DrAlx]

I have a question regarding the differing ways of tying the BBD outputs together.
I've seen that tying the outputs together gives more clocking noise than separating them with some resistance.
On one of my other builds, the BBD outputs are hooked together something like this...

Code: [Select]

Out1---5k---+
            +--------+
Out2---5k---+        |  
            |       680pF    
           50k       |
            |       Gnd
           Gnd  

I can see no clock glitches when I look at the audio waveform at the top of the capacitor, so I don't think it will help me to replace those 5k resistors with a trim pot since my simple scope won't help me set things up to improve on what is already there.  So I am probably going to use fixed resistors.

Is there some advantage/disadvantage to using the above 3 resistor scheme compared to the following 4 resistor scheme (similar to what PureTube described apart from the trimpot). i.e.

Code: [Select]

Out1---+---5k---+
       |        |
      100k      |
       |        +------+
      Gnd       |      |  
                |     680pF  
Out2---+---5k---+      |
       |              Gnd
      100k
       |        
      Gnd        

I can see similarities:
The resistance between BBD outputs is 10k in both cases.
Each output gets acted on by (5k + 680pF) LPF.
Each BBD output has roughly the same impedance to ground: 55k in one case and 52.38k (= 100k || 110k) in the other.

I also see this difference:
The first scheme attentuates the signal by ( 50k/55k )  = 0.4 dB while the second doesn't.

Is this attentuation (and one less resistor) the main difference between the two schemes, or is there something else that I have not considered?

[armdnrdy]

If you are referring to the two outputs of a single BBD, the better way to do it from what I've seen is to use a trimmer between the two outputs so that you may "dial" the output in with a scope to "superimpose" one output on top of the other to remove clock glitches.

[DrAlx]

I have a question regarding the differing ways of tying the BBD outputs together.
I've seen that tying the outputs together gives more clocking noise than separating them with some resistance.
On one of my other builds, the BBD outputs are hooked together something like this...

Code: [Select]

Out1---5k---+
            +--------+
Out2---5k---+        |  
            |       680pF    
           50k       |
            |       Gnd
           Gnd  

I can see no clock glitches when I look at the audio waveform at the top of the capacitor, so I don't think it will help me to replace those 5k resistors with  trim pot since my simple scope won't help me set things up to improve on what is already there.  So I am probably going to use fixed resistors.
EDIT:  Actually I just retested and I can in fact see the glitches but found that using a 10k trimpot instead of fixed 5k's didn't improve things.

Is there some advantage/disadvantage to using the above 3 resistor scheme compared to the following 4 resistor scheme (similar to what PureTube described apart from the trimpot). This is the sort of arrangement in the MN3207 datasheet...

Code: [Select]

Out1---+---5k---+
       |        |
      100k      |
       |        +------+
      Gnd       |      |  
                |     680pF  
Out2---+---5k---+      |
       |              Gnd
      100k
       |        
      Gnd        

I can see similarities:
The resistance between BBD outputs is 10k in both cases.
Each output gets acted on by (5k + 680pF) LPF.
Each BBD output has roughly the same impedance to ground: 55k in one case and 52.38k (= 100k || 110k) in the other.

I also see this difference:
The first scheme attentuates the signal by ( 50k/55k )  = 0.4 dB while the second doesn't.

Is this attentuation (and one less resistor) the main difference between the two schemes, or is there something else that I have not considered?

[armdnrdy]

If you are referring to the two outputs of a single BBD, the better way to do it from what I've seen is to use a trimmer between the two outputs so that you may "dial" the output in with a scope to "superimpose" one output on top of the other to remove clock glitches.

I did read your post Alex, and I replied when no one else did...what I feel is the best solution.

It is common knowledge that BBDs exhibit slightly different characteristics from unit to unit. It is a common occurrence to have to re-bias a circuit that has already been "aligned" when a different BBD is installed. With that being said, I prefer to include a trimmer to balance the BBD output rather than leave things to chance.

If you are building a one off circuit and everything looks great....then fine. If you are working up a project where old stock BBDs from various sources are to be used, then I would design for worst case scenario.

[StephenGiles]

I agree with Larry.  There is an old Philips circuit designed to increase signal to noise on TDA 1022 connected in series for longer delay, which may be of use if I can locate it. It's 5.30 am here and I've just been woken up by a very loud moped - back to sleep!!

Voila!
https://www.dropbox.com/s/asosgxw7q44tfit/seriesdelay.doc
https://www.dropbox.com/s/a7aplq185hy722z/TDA1022_c%5B1%5D.jpg``

[armdnrdy]

Where do you get these things from Stephen?

Thanks...another one for the BBD files.

[StephenGiles]

Where do you get these things from Stephen?

Thanks...another one for the BBD files.

This one I got from a Philips office in London way bach in the 1980s. I called them to see if they would let me have a TDA1022 sample, the guy asked me to call in that day and gave me 10 of them with the circuit just posted, which I built - on veroboard of course!!

[puretube]

page2...

BBDementia courtesy Mark Hammer...

[DrAlx]

Thank you all for your replies   My problem is I'm trying to juggle a few conflicting requirements in doing this new vero layout.
On the one hand I want to minimise part count and simplify things, but making some of these improvements will increase the part count.

Stephen's link is interesting for 2 reasons.  One is that all BBDs are given the same bias level.   The only other example I've seen of that is in the BYOC Flanger.
Also, I think I read a post by Mark Hammer mentioning he'd used a single bias level for multiple BBDs and that you can often get away with that (presuming the BBDs have the same supply voltage).  I'm therefore inclined to leave the bias scheme as it is because it saves me adding more components and coupling caps to the BBD inputs. 
I'm aware that the optimal bias level will vary from device to device.  So Larry, when you say that changing a BBD can mean you need to re-bias, do you mean that you need to do that because the optimal bias level has changed (i.e. it's not an audible difference, but you can see the difference when you go through the bias procedure with a scope), or do you need to rebias because the new BBD bias point is so far from the old that you get noticeable clipping if you don't rebias?
The reason I ask is that I'm not concerned (at the moment) about tweaking every BBD to its optimal bias voltage, because I've seen that there's actually a small range of bias voltages that let the BBD work OK without clipping the guitar signal. All I need is for there to be an overlap between the range of OK bias levels for the two BBDs.  I've got around a dozen MN3207 to experiment with and I'm hoping that once I've set a single bias level, changing ICs will still keep things working OK with no clipping.

The other interesting thing from Stephen's link is that only the last BBD in the chain gets a trim pot to balance its clocking noise at the output.  All the other ones just have the inputs tied together, (presumably because using resistors there is worse for S/N than using a current sink) ?  I've also seen that many pedals don't bother with any sort of BBD output trimpot (Original EM, MXR 117, Morley Flanger, Foxrox Paradox TZF, Boss CE-2, Boss DC-2) while other ones do (Deluxe EM, A/DA Flanger, Flanger Hoax).
I can see how manufacturing differences and ageing affects can change the bias requirements of one IC versus another, but is there really a big difference between the two sets of buckets within the same IC?  I am inclined to do the vero in such a way that gives the builder the option of using either fixed resistors or a trim pot at the BBD output.

[Fender3D]

Central part of "misbiasing" will be just a level dropping, the rest of misbiasing will be clipping, then no more signal at output... 
Notice that you should need rebiasing even when varying Vgg

...The other interesting thing from Stephen's link is that only the last BBD in the chain gets a trim pot to balance its clocking noise at the output.  All the other ones just have the inputs tied together, (presumably because using resistors there is worse for S/N than using a current sink)

You'll null clock by mixing 2 clock signals out of phase each other, then ,since BBDs are in cascade, you can null just @ the last output (unless any previous stage is way out of balance...)