NEW CIRCUIT DESIGN: NZF Flanger

[StephenGiles]

Are the boards in a grounded metal box?

I just tried putting them in one now, and put the lid on too.  No difference I'm afraid .

Is there a PC switched on near the boards? That can induce the sort of noise I heard on the samples. Have a look at this - I can't see a link to the actual schematic but there is a link to the PCB parts placement so this may provide some clues to minimising the interference. It seems to use a 4046/3102/3207 arrangement for the clocking circuitry.

And I just found an old message from Puretube on this very subject - "a good PCB/vero design CAN prevent whine/clocknoise/heterodyning!

(especially when you provide enough space, like in a 19" rack...)."

[DrAlx]

I tried that Stephen, and I get the same noise with the PC off.  I'm sure it's the VCOs interfering because if I take an insulated wire from the clock pin of one BBD and put the other tip of the wire close to the other VCO (in order to spray interference all over it) it will make the heterodyning sound increase (and as I recently discovered, in some cases actually almost disappear, probably some phase thing).
I think I need to redo the whole layout and physically separate the two delay/VCO sections.
It won't fit in a 1590BB but will easily fit a BBDD box from Banzai.
My idea is to first build the two delay lines on separate boards.  That way I can try Puretube's scheme of separating the supply and grounds.
I'm in the process of working out a PCB layout (sneak peek below).  I may use groundplanes on my test stripboards but I reckon I can probably do without and do the equivalent of a ground-fill with the strips instead.
I've more or less got the LFO and delay lines worked out, and need to work out how to put the other audio sections on there.
There is still just a single (green) ground at the moment, but it should be straightforward to cut it up.
I haven't put in the mods Puretube suggested yet but I definitely will do.
Regarding the BBD outputs, is there really a big difference between using separate resistors or a trimmer there, or just tying them together as I have done?  I know the FoxRox Paradox just ties the pins together.  BTW Stephen , I think you forgot to attach a link or something on your last post.

[StephenGiles]

No there is no link, it was from a message.

[puretube]

most important thing IMHO,
is to NOT have the two pins3 of the two BBDs interconnected directly.

I think I see what you mean.  If I understand you correctly, the 2 clocks may be interfering because the sampling process at one BBD input affects the input line, and so affects the sampling process at the other BDD input.  That didn't occur to me as a possible interference mechanism.  Let me hack those LPFs into the vero tomorrow and I'll report back.

Exactly...

[puretube]

I was just going to say there are no small caps shown across the power-pins of the ICs in the schemo,
but you mentioned them in the instructrions.
So I assume they are in there in the build.
You also mention to keep the rate-pots-wires away from signal in/out.
But: keep them away from each other as well!
(You might even screen them, too).

Next thing: the daisy-chained power-supply:
Route the left sides of R58/59/60 to the power-connection separately,
and put another 100nF from their common point to ground.
Then more 100nF caps in parallel to C33 & 34.
Even better use 2 separate supply-paths
to IC4/7/8/9 & Q5
and to IC2/10/11/12
with individual de-coupling.

Supply-wise, the BBDs (IC2 & 4) can be regarded "digital",
rather than "analog"...
(my CH=270p at the input functions as anti-aliasing filter with RI
as well as clock-bleed-off with RA...).

And: don`t forget that  if you e.g. work with clocks of 249kHz & 251kHz,
you may not only get audible heterodyned 2 kHz in the audio-path,
but may also radiate 500kHz into the surrounding area,
where it can heterodyne with real Radio...

[puretube]

most important thing IMHO,
is to NOT have the two pins3 of the two BBDs interconnected directly.

Absolutely,  thought about this - would 10k and 2n7 be really enough Ton? I would be looking at something nearer to 100k.

Also, if the BBD outputs are symmetrized, remember that you will need resistors to audio ground directly from all 4 BBD outputs. Is 56k enough? I notice that you have 100k Ton.  

What is the advantage of using a 3102 in your circuit Ton apart from generation of a clean Vgg ? Could he not cut down on parts by using a 4047 with suitable modulation tricks instead of the 311/4013 arrangement? Remember this discussion?
http://www.diystompboxes.com/smfforum/index.php?topic=49560.5;wap2

I did get a very smooth sweep in a flanger some years back using a 4047 with a TDA 1022, but was forced to remove it from my breadboard by the BBD Taliban!!

1.) Input-filter: I use 100k/270p see post above...

2.) Output Rs: 100k according to datasheet...
     the symm-pot halves with CE=470p function as lopass filters for both outputs.
    (the pot-value is double the datasheet-value, to ensure there is at least a few kohm before the cap...)

3.) 3102-Vgg is nothing else but 2 onchip-resistors...
     saves me 2 resistors + drilling 4 holes, plus space...

     2x3102 is only 2 holes more than 1x4013, but spares me heterodyne-hassle
     due to physical separation,
     and then again saves me 4 resistors + drilling 8 holes, plus soace...

3102 can drive a 3207 well, without extra "push-up" inverters...


I prefer 4046 for direct voltage-controllability - spares me heterodyne-hassle on rate-pot-wires,
and doesn`t ask for voltage-controlled resistors or diodes/transistors/LDRs...


To expand furthermore,
I like sine-LFOs for modulation because of non-tickability,
and sparing an extra any-wave-to-sine-wave-conversion...

[DrAlx]

Thank you for the continuing support Puretube

I was just going to say there are no small caps shown across the power-pins of the ICs in the schemo,
but you mentioned them in the instructrions. So I assume they are in there in the build.

Yes they are on the back of the board.

Next thing: the daisy-chained power-supply:
Route the left sides of R58/59/60 to the power-connection separately,
and put another 100nF from their common point to ground.
Then more 100nF caps in parallel to C33 & 34.
Even better use 2 separate supply-paths
to IC4/7/8/9 & Q5
and to IC2/10/11/12
with individual de-coupling.

I haven't tried routing all the power back to a common point yet but I had already tried going some way in that direction
before I asked for help with this heterodyne problem.  I split the supplies for two VCOs apart like this

Code: [Select]

                                                ----(10k+470uF)----(VCO 1 ICs)----(10k+470uF)----(LFO ICs)
                                               /
9V----(10k+470uF)----(AUDIO PATH ICs  and BBDs)
                                               \
                                                ----(10k+470uF)----(VCO 2 ICs)

I could short out things on the back of the board so I could toggle between my original layout and the above modification.  I didn't hear any noticeable effect on the heterodyne noise so I put things back.  (I also tried 100nF in parallel to the 470uF caps but that didn't seem to make any difference).  I guess the existing 100nF on the IC supply pins were either already enough, or nowhere near enough.

One thing that I cant really do though is put the resistors on the ground supply lines between sections because of the global ground plane.  I may try and cut a slot in the ground plane to separate the VCOs more, and see if that helps.

One other thing occurred to me is that the precision trim pots I am using for the clocks basically consist of a loop of material that sits vertically in the air at 90 degrees to the ground plane (rather than flat against it).  Isn't that going to make nice antenna?  I think I will try and see if I can wrap those pots in grounded copper foil.  

Supply-wise, the BBDs (IC2 & 4) can be regarded "digital", rather than "analog"...
(my CH=270p at the input functions as anti-aliasing filter with RI as well as clock-bleed-off with RA...).

Thanks for clearing that up.  I was never really sure if the BBDs should be treated as digital or analogue when it comes to supply.
What you say about the cap at the input makes sense.  Just for fun I think I will have a go at disconnecting one of the BBD input lines and audio probe the BBD input pin to see how much of those clock tweets filter through to the input.

And: don`t forget that  if you e.g. work with clocks of 249kHz & 251kHz,
you may not only get audible heterodyned 2 kHz in the audio-path,
but may also radiate 500kHz into the surrounding area,
where it can heterodyne with real Radio...

Yes I know.  With some of the rubbish they play on the radio nowadays you'd think heterodyne noise would be an improvement  But seriously, I seem to remember reading a thread recently about commercial products having to comply with FCC guidelines/paperwork on clocks as low as 10kHz.
I better put the board in a biscuit tin when I work on it.

[DrAlx]

I like sine-LFOs for modulation because of non-tickability,
and sparing an extra any-wave-to-sine-wave-conversion...

Here is where my lack of experience shows.  I wanted a sine wave oscillator but have only ever built one using OTAs (from the LM13600 datasheet).
If I could find a design for a simple amplitude stable sine wave LFO (with low part count) I would use it for sure.
I only used the triangle to sine approximation because I went with what I new.
The problem with what I have is that the amplitude of the "sine" wave increases as the Rate pot decreases which is why the sweep can't be set up to give "touching sine wave bottoms" at all rates.  If there's a sinusoidal LFO that maintains its amplitude at different rates then that would be great.

[puretube]

...though I`m currently more involved in a 1-Transistor Through-Zero-Fuzz* development...

**



 


*** real-time (delay-less) 1 Transistor audiopath, that is...

+ extra IC-LFO (as to be found in this forum, somewhere...)  
(1-transistor-oscillator possible, as well...)

DrAlx got me thinking: Envelope-controlled-TZ-Fuzzing should be possible with that only 1 transistor, though...  


Final version might add 2 extra in-/out-put transistorz for bufferz...

[puretube]

B.T.W.: DrAlx,
I really dig your concept of "approaching modulation",
and that`s why I want you to get rid of the hindering hetero-crap
that is limiting your idea too much!
You gotta get over the (zero-) hump... 

[StephenGiles]

I like sine-LFOs for modulation because of non-tickability,
and sparing an extra any-wave-to-sine-wave-conversion...

Here is where my lack of experience shows.  I wanted a sine wave oscillator but have only ever built one using OTAs (from the LM13600 datasheet).
If I could find a design for a simple amplitude stable sine wave LFO (with low part count) I would use it for sure.
I only used the triangle to sine approximation because I went with what I new.
The problem with what I have is that the amplitude of the "sine" wave increases as the Rate pot decreases which is why the sweep can't be set up to give "touching sine wave bottoms" at all rates.  If there's a sinusoidal LFO that maintains its amplitude at different rates then that would be great.

http://experimentalistsanonymous.com/diy/Schematics/Oscillators%20LFOs%20and%20Signal%20Generators/Sine%20Wave%20Quadrature%20Oscillator.pdf

[DrAlx]

Thanks Stephen. Looks like an OTA based phase-shift oscillator.  Is the section with all the diodes doing some sort of amplitude control?
The OTA phase-shift oscillator I have already built could go up to 30kHz no problem but was very unstable as soon as you got down to low frequencies (say under 100Hz)  and would be no good for this flanger.   I can't tell if the one in the link would have the same problem.
Just to be clear about amplitude stability, I need amplitude to be stable in time but more importantly the same value amplitude at all frequencies of interest.T
To me, that implies that there must some kind of reference voltage level in the circuit (is that what the zener is all about?)

For the square/triangle oscillator, the "reference voltages" are the top and bottom supply rails that get hit by the square-wave.
I was hoping that would give constant square-wave amplitude, and so constant triangle wave amplitude, and so constant sine-wave amplitude.
That didn't turn out to be the case  The supply voltage on the LFO is 8.36 at low LFO frequencies and 8.19V at high LFO frequencies.
So when I first mentioned trying to improve the LFO by "regulating" it, I was actually referring to making sure the square wave always hits the same top and bottom values so that the sine wave has a reproducible minimum value.

[puretube]

something wrong with the powersupply....
("daisy-chained"...)

[puretube]

More musings on the theme(-s):
square wave to sinewave converter
Quad Triangle LFO
A/DA Flanger does TZF?
[ ? ] Continuously variable phase
Let's talk about opamp LFO's
...

[DrAlx]

something wrong with the powersupply....
("daisy-chained"...)

I had a similar thought but wasn't sure exactly what was causing the drop on the LFO supply.  I thought maybe the 470uF supply cap was somehow working as a better store of power at lower LFO frequencies and not so much at high.   Also, one of the things I did several weeks ago was measure the voltages between the tips of those 10R resistors on the supply lines so I could work out the current draw and hence power consumption as the power went down the daisy chain.
I can't remember the actual figures, but it was around 30mA in total for the pedal.  The LFO was the lowest (I think around 5mA).  The audio and VCOs powers were roughly the same size, with the VCOs a little larger I think.  I had a hunch that the VCOs were sucking power and affecting the LFO, so I tried feeding in power at the LFO side of the daisy chain rather than the audio side.  I can't remember if this really helped.  Part of the problem is I'm spending far too many late nights on this, so I mentally I am not as sharp or organised as I should be.
I'll give the power supply reworking another go on my current board, and do some reading around the subject of LFOs, but the heterodyning is my priority.
BTW, I tried a cut in the ground plane and it didn't help.  I'll definitely need to test things with an off-board VCO so I can experiment properly with the supply scheme and see how physical separation affects heterodyning.   I'm sure I'll crack this in the end and I'm not one to give up on a problem, but I have little time to do all this 'cos of my regular job, so progress will probably be slow.

[DrAlx]

At least one problem solved (or solveable) now  
The sweep can reliably hit the zero point without crossing it for all settings of Rate and Depth.
Puretube was correct, the daisy chain power supply scheme was the problem.  
I just tried feeding power in at the other end of the daisy chain and the sweep was good.   So reworking the power supply to tackle the heterodyning will fix the sweep too.
I had tried feeding in power at the LFO end of the daisy chain before (to see if it helped with the heterodyning, I think) but didn't bother to check the sweep.  So just that heterodyning problem left to tackle.

Edit:  and one more thing...
I just discovered that the hex buffers for the clock were not in fact buffered.  Turns out I had CD4049UBE chips in there.  Which makes me ask why the data sheet for the CD4049UBE calls them inverting buffers?  Are there buffered buffers and non-buffered buffers?  What the buff ?!?!

I only found out my mistake when I was reading one of the other threads and noted R.G. emphasizing the "B" suffix when referring to them.
I was wondering why the clock wave form was looking a bit rounded compared to one of my previous builds.  Just swapped them for CD4049Bs from my other build and what a difference.  Much more clarity now.

[StephenGiles]

Edit:  and one more thing...
I just discovered that the hex buffers for the clock were not in fact buffered.  Turns out I had CD4049UBE chips in there.  Which makes me ask why the data sheet for the CD4049UBE calls them inverting buffers?  Are there buffered buffers and non-buffered buffers?  What the buff ?!?!

I only found out my mistake when I was reading one of the other threads and noted R.G. emphasizing the "B" suffix when referring to them.
I was wondering why the clock wave form was looking a bit rounded compared to one of my previous builds.  Just swapped them for CD4049Bs from my other build and what a difference.  Much more clarity now.

That's strange - or maybe not. It never made any difference with my ADA Flanger whether I used 4049UBE or 4049B that I can recall.

[DrAlx]

That's strange - or maybe not. It never made any difference with my ADA Flanger whether I used 4049UBE or 4049B that I can recall.

I'm going to have a go at hacking in Puretube's changes on the +ve supply line.  I'll do a recording of the sounds with the UB and B chips to better A/B the difference.  The clock waveforms are noticeably sharper with the B chip.  When I used a scope on the UB chip, I could see sharp clock edges on all the output pins except for the those connected directly to the BBD (which were noticeably rounded off).  The B chip pins showed sharp clock edges on all the output pins.

[StephenGiles]

That's strange - or maybe not. It never made any difference with my ADA Flanger whether I used 4049UBE or 4049B that I can recall.

I'm going to have a go at hacking in Puretube's changes on the +ve supply line.  I'll do a recording of the sounds with the UB and B chips to better A/B the difference.  The clock waveforms are noticeably sharper with the B chip.  When I used a scope on the UB chip, I could see sharp clock edges on all the output pins except for the those connected directly to the BBD (which were noticeably rounded off).  The B chip pins showed sharp clock edges on all the output pins.

I wonder if you would notice any difference when battling against a drummer & bass player - or/perish the thought......a keyboard player??

[Fender3D]

I wonder if you would notice any difference when battling against a drummer & bass player - or/perish the thought......a keyboard player??

Lol
maybe you'd better carry on with your heterodyning flanger, sooner or later they'll stop playing against you...