Thank you for the continuing support Puretube

I was just going to say there are no small caps shown across the power-pins of the ICs in the schemo,
but you mentioned them in the instructrions. So I assume they are in there in the build.
Yes they are on the back of the board.
Next thing: the daisy-chained power-supply:
Route the left sides of R58/59/60 to the power-connection separately,
and put another 100nF from their common point to ground.
Then more 100nF caps in parallel to C33 & 34.
Even better use 2 separate supply-paths
to IC4/7/8/9 & Q5
and to IC2/10/11/12
with individual de-coupling.
I haven't tried routing all the power back to a common point yet but I had already tried going some way in that direction
before I asked for help with this heterodyne problem. I split the supplies for two VCOs apart like this
----(10k+470uF)----(VCO 1 ICs)----(10k+470uF)----(LFO ICs)
/
9V----(10k+470uF)----(AUDIO PATH ICs and BBDs)
\
----(10k+470uF)----(VCO 2 ICs)
I could short out things on the back of the board so I could toggle between my original layout and the above modification. I didn't hear any noticeable effect on the heterodyne noise so I put things back. (I also tried 100nF in parallel to the 470uF caps but that didn't seem to make any difference). I guess the existing 100nF on the IC supply pins were either already enough, or nowhere near enough.
One thing that I cant really do though is put the resistors on the ground supply lines between sections because of the global ground plane. I may try and cut a slot in the ground plane to separate the VCOs more, and see if that helps.
One other thing occurred to me is that the precision trim pots I am using for the clocks basically consist of a loop of material that sits vertically in the air at 90 degrees to the ground plane (rather than flat against it). Isn't that going to make nice antenna? I think I will try and see if I can wrap those pots in grounded copper foil.
Supply-wise, the BBDs (IC2 & 4) can be regarded "digital", rather than "analog"...
(my CH=270p at the input functions as anti-aliasing filter with RI as well as clock-bleed-off with RA...).
Thanks for clearing that up. I was never really sure if the BBDs should be treated as digital or analogue when it comes to supply.
What you say about the cap at the input makes sense. Just for fun I think I will have a go at disconnecting one of the BBD input lines and audio probe the BBD input pin to see how much of those clock tweets filter through to the input.
And: don`t forget that if you e.g. work with clocks of 249kHz & 251kHz,
you may not only get audible heterodyned 2 kHz in the audio-path,
but may also radiate 500kHz into the surrounding area,
where it can heterodyne with real Radio...
Yes I know. With some of the rubbish they play on the radio nowadays you'd think heterodyne noise would be an improvement

But seriously, I seem to remember reading a thread recently about commercial products having to comply with FCC guidelines/paperwork on clocks as low as 10kHz.
I better put the board in a biscuit tin when I work on it.